RTOS/TMS320C6678: IPC concept

Daruish,

I think you are using a fairly old version of IPC, please download the latest Processor SDK RTOS for this device and locate the IPC example under

\ipc_3_44_xx_xx\examples.

MessageQ typically uses shared memory regions like MSMC and DDR so L2 should not be preferred as you can see from Rob`s response here:

e2e.ti.com/.../1592214

You can pass a pointer to a buffer in L2 using global address using MessageQ instead using  L2 memory for MessageQ heap or Shared memory.

Specifically for messageQ, I would recommend that you look at the setup of the image processing demo that uses the MessageQ protocol to communicate between master core0 and slave cores. That example setups up the Shared memory in MSMC memory for the device using the following configuration:

var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
/* Shared Memory base address and length */
var SHAREDMEM           = 0x0c200000;
var SHAREDMEMSIZE       = 0x00200000;

SharedRegion.setEntryMeta(0,
    { base: SHAREDMEM, 
      len:  SHAREDMEMSIZE,
      ownerProcId: 0,
      isValid: true,
      name: "MSMCSRAM_IPC",
    });

var HeapBuf   = xdc.useModule('ti.sysbios.heaps.HeapBuf');
var HeapMem   = xdc.useModule('ti.sysbios.heaps.HeapMem');

/* Create a Heap. */
var heapMemParams = new HeapMem.Params();
heapMemParams.size = 0x8000000;
heapMemParams.sectionName = "systemHeapMaster";
Program.global.heap0 = HeapMem.create(heapMemParams);
Memory.defaultHeapInstance = Program.global.heap0;

For checking providing data pointer using messageQ, refer to the function mc_process_init, this is where the application allocates memory for the messages using the heap and each message is in form of a structure "process_message_t" 

typedef struct process_message {
    MessageQ_MsgHeader  header;
    int                 core_id;
    processing_info_t   info;
} process_message_t;

typedef struct processing_info {
    processing_type_e processing_type;
    uint8_t *         rgb_in;
    color_table_t   * p_color_table;
    uint16_t          bitspp;
    uint32_t          width; 
    uint32_t          height;
    uint8_t *         out;
    uint8_t *         scratch_buf[NUMBER_OF_SCRATCH_BUF];
    uint32_t          scratch_buf_len[NUMBER_OF_SCRATCH_BUF];
    int               flag;
} processing_info_t;

You can modify the Processing info structure based on your application requirement and use one of the pointers variables to pass the data that you have defined in L2RAM or any memory on the SOC. Note: For L2 you will need to provide global address not the DSP local address.

Hope this helps.

Regards,

Rahul

PS: useful resources for MessageQ 

processors.wiki.ti.com/.../MessageQ_Module

processors.wiki.ti.com/.../IPC_3.x

Hi Rahul

Thank you so much, I investigate " image_proc_IPC " and I have some questions.

I used MCDSK version 2.1.2.6 and it is the last version in the 2.x.x.x release. I thought MCDSK V2 is used for KEYSTONE I and MCDSK V3 is used for  KEYSTONE II, according to my DSP(C6678 keystone I) I used MCDSK version 2.1.2.6.

Q 1: 

Am I I thinking right? Is it possible to use MCDSK V3 for KEYSTONE I?

In many cases the users want to use the cores as a " Pipeline " model. Core0 received the data and send it to next core and finally the last core send back the final result to Core0 for transmit.

Q 2:

Is there any example for Pipeline Model?

In using IPC we should declare heap and shared region.

Q 3:

What is the relation between heap and shared region? What is the difference between heap and shared region in application?

BR

Please,answer me.