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TMS320C6655: Boot problems

Audrey FRISCH
Prodigy 250 points
Part Number: TMS320C6655

Hi all,

After successfully starting the EVM C6657 board in SPI boot mode, we tried to boot in SPI mode with our final board which integrates a C6655.

The configuration of clocks is normally the same as the one on EVM board (100 MHz for the core, 66.67 MHz for the DDR3). We therefore use the same boot table as for the EVM board.

The problem we have is that after having loaded the binary into the SPI flash (this part works well), and after resetting the component, the microcontroller remains at the address 0x20b0eb90. The PLLM and PLLEN registers are equal to 0.

Do you have any idea what might happen ?

  • 0
    TI__Guru**** 161600 points
    Hi,

    Which SDK is this?
    Have you build the ibl with the correct parameters (see the Makefile in ~/ti/pdk_c667x_2_0_3/packages/ti/boot/ibl/src/make/)?

    Best Regards,
    Yordan
  • 0
    TI__Guru** 114410 points
    Can you please connect to the DSP when it fails to boot and look at the DEVSTAT register at (0x02620020) and confirm that it is configured correctly to SPI flash boot as per the datasheet. The Program Counter value of 0x20b0eb90 that you are reporting does seem to be in area of bootROM where SPI read functions are defined.

    If it is configured correctly, can you put a scope on the SPI CS and SPI clock and see if the chip select goes low and the clock is observed from the SPI_CLK pin. The PLL will be in bypass unless, you are providing a boot parameter table.

    Regards,
    Rahul
  • 0 in reply to Rahul Prabhu
    Prodigy 250 points

    Hi Rahul, thank you for your answer. You were right ! The DEVSTAT register was not as we expected.

    We have done some hardware modifications on the boot pins in order to have the right configuration.

    Now the DEVSTAT register is good but we have always the same problem : the microcontroller stays at the address 0x20b0eb90.

    But something new : the registers pllm is configured. I have read this value in Code Composer in the PLL registers.  This register was equal to 0 before so we can suppose that the microcontroller has read the value in the SPI flash memory. But I don't really understand this value since I choose a  sw_pll_mult equal to 19 in the nysh.spi.map file. I would have like to find 19 in this pllm register, right ?

    It might be the DDR configuration wich could be wrong, I think. Do you have any idea what could be wrong ?

  • 0 in reply to Rahul Prabhu
    Prodigy 250 points
    By looking in the DDR3PLLCTL0 register, I realize that I have the following values :
    PLLD : 0
    PLLM : 19
    Bypass enabled

    Whe I load new binary with a different DDR config, the registers are not updated. It seems that the DDR Config is not reached...

    What do you think about this ?
  • 0 in reply to Audrey FRISCH
    TI__Guru** 114410 points

    Audrey,

    Is the DDR memory on your custom board same as the EVM or is it different. also is the CLKIN for DDR is it the same as the EVM.

    If yes, were you able to connect to the DSP using an emulator and run the GEL to initialize the DDR? Have you run a diagnostic to make sure DDR read/write works correctly independent of boot. I am assuming that you are putting the DDR configuration table in the same location since you have the same boot image as the EVM. Have you checked the memory location where the DDR configuration table needs to be loaded to see if it was copied to the correct location.

    Have you tested if the boot works without DDR as in create an image which runs the application from MSMC and see if this application boots correctly. 

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 250 points
    Rahul, thank you for your quick answer.

    The DDR memory is exactly the same as the one on the EVM. The CLKIN for DDR is 66,67 kHz. I think it was the same on the EVM, isn't it ?

    I am able to connect to the target with a XDS200 probe and launch the same gel file as for the EVM to initialize the DDR. After doing this, I am able to load a program. With this program I tried to read/write in the SPI memory and it works well.

    I put the DDR config table in this location (same for EVM) : 0x008FFD20

    Your question is very interesting. I put the config at this address on the EVM (which is a C6657) but maybe it is not this location for a C6655 target ?

    About your last question : "Have you tested if the boot works without DDR as in create an image which runs the application from MSMC and see if this application boots correctly"
    No, I didn't tried this. Could you explain a little bit how I can test this ? How can I create such an image and run it from MSMC ?

    I really thank you for taking time to help me !
  • 0 in reply to Audrey FRISCH
    Prodigy 250 points

    Rahul,

    I have solved our problem !

    After your last post, I checked in the L2 cache and I realized that the DDR config table was not there. As you said the microcontroller was not booting in SPI correctly, I checked again the config of hardware pins (DEVSTAT) and the boot table config (in nysh.spi.map). Finalement, the problem was easy to find : the pins related to polarity/phase were set for mode 1 whereas the mode was set to 0 in the table boot.

    Now it works perfectly well and I would like to thank you because your idea was the good one :)

  • 0 in reply to Audrey FRISCH
    TI__Guru** 114410 points
    Audrey,

    Thanks for the update. I am glad that I could be of help in resolving this boot issue on your custom board.

    Regards,
    Rahul