TMS320C6678: Questions about MSMC Scrubbing Engine on C66x

Hi Chris

This is my personal understanding from reading chapter 2.5.4 of www.ti.com/.../sprugw7a.pdf

Where does it start to scrub first or it just scrubs sequentially from the first location till last or else?

>>>> since the scrubbing is done by a state machine, and I have no found any register that control the starting address of the state machine, I assume that it starts from the first location and continue until teh end and starts again



How fast can it complete the scrubbing of whole 4MB of SL2? Let’s assume default REFDEL of 1 is used which means 1024 MSMC clock cycles between each burst. So for a 1.1GHz part where MSMC draws from SYSCLK3 which is ½-rate clock, so that’s roughly 1.86µs between bursts.

>>>> My understanding is that in order to cover 4MB of MSMC memory (or 64 * 64K) the number of cycles that is needed is 64K *1024 (I assume the actual read and write is negligible compare to the time between bursts) so it takes 64M MSMC cycles, and for C6678 it is 128M cycles or 125 milliseconds. Does it make sense to you?


What happen during the scrubbing cycle or a scrubbing burst when a master also attempts to access the same location that is being scrubbed?

>>>> Like anything else in this system there is a priority scheme. I am not sure which one will have a priority but I assume that when scrubbing starts it blocks the access to the 64 bytes until it is done.

What is the size of each scrubbing burst?

>>>> In the calculation above I assumed that a burst is 64 bytes. I will ask around to see what is the burst. If the burst size is more than 64 (and it must be a multiplication of 64 bytes) then the complete cycle time is different. In any case, I am going to inquire around and I will get back to you about this


If memory protection is programmed in MSMC, would this somehow conflict with the scrubbing engine’s operation? That is for a certain MSMC RAM region I've programmed it to be read-only (for a certain PrivIDs), would the scrubbing engine’s attempt to correct a 1-bit error in that read-only space triggers a memory protection fault?

>>> I do not think that read only for certain PrivID changes anything. The protection is done in the interface between the bus and the MSMC while the scrubbing is internal to the MSMC

Again, I will verify the burst size.

Ran

Not sure about the report, but from the design document:

A fully pipelined scrub burst sequence of 4-reads,4-writes of four consecutive memory addresses is employed.
This locks out each sub-bank for 8 cycles but results in better utilization of the bandwidth available at the banks

So the scrubbing burst is 4 reads of a sub-bank. Each sub-bank of C6678 is 32 bytes, so 4 reads are 128 bytes.  You can plug it into the formula for the complete scrubbing time

Ran