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66AK2G02: K2G, DCAN, internal loop works but no TX activity w/wo loop

Part Number: 66AK2G02

We are using the K2G on the evmK2G.

The DCAN0_TX pin toggles external when programmed via GPIO.

I did write a DCAN0 test which passes when I turn on internal loop with or without silent mode.

I do not see a signal toggling on the DCAN0_TX pin (in non silent mode).

The test fails when external test mode is turned on.

When I switch off loop testing, I still don’t see activity on the DCAN0_TX pin.

I measure with a nice osci (DCAN0_TX pin to GND) with and without an external 120R.

I see the behavior on both of our evmK2G boards.

 

What am I doing wrong ?

 

Thank you for your time in advance.

  • Hi MotorControl,

    I've forwarded this to the design experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • MotorControl,
    To get some details, which specific example are you running? Which release?

    Lali
  • "I did write a DCAN0 test". There is no specific example or release because it is the one of our company.

    I think the question is very detailed.

    Which register bits affect the connectivity between the internal DCAN0_TX signals and the external pin ?

    The internal loop works, but there is no activity on the external TX pin in loop mode or when the internal test mode is turned off.

    Physically,  the connectifity between chip pin and osciloscope works.

    What would be the strategy to solve this problem ?

  • MotorControl,

    I would start by putting breakpoints in your code and stepping through. Are you using interrupts?Are you seeing the TXIE bit get set? Do you see any of the frames in the Message RAM IFx? Is there anything in the transmission request registers DCAN_TXRQ_X?

    Lali

  • I don’t think stepping through the code would help, because the test passes.

    The question is, which register in the overall device affects the physical path between the internal CAN0_TX for loop back and the physical pin on the board. The datasheet says, that the external CAN0_TX pin should show activity when the internal loop back (non-silent) mode is set. We don’t see the activity (though the test passes). We tested that we can toggle the pin by programming the GPIO in a separate program.

  • MotorControl,

    The DCAN_TEST register in the TRM might be of interest. www.ti.com/.../spruhy8e.pdf
    Have you tried to run the DCAN loopback test that's part of the board diag test ? Its located at C:\ti\pdk_k2g_1_0_5\packages\ti\board\diag\dcan

    I understand that you have already written your own test, but I just wanted to point this one ou. It could provide some help in case you wanted to check how the code is configuring stuff. the file dcan_test.c has some macros at the top that sets loopback, etc.

    Lali
  • Lali,

    in fact, it is the slightly modified one from the DIAG directory.

    Of course, the DCAN_TEST register is of interest, because that’s the only register for loopback control.


    The question is, which register in the overall device affects the physical path between the internal CAN0_TX for loop back and the physical pin on the board. The datasheet says, that the external CAN0_TX pin should show activity when the internal loop back (non-silent) mode is set. We don’t see the activity (though the test passes). We tested that we can toggle the pin by programming the GPIO in a separate program.
  • Hi MotorControl,
    As part of you test, have you configured the PADCONFIG_127 register to select the DCAN0_TX function? By default, that pin is configured as a GPIO so if you haven't configured the register, you won't see the DCAN signals.
    Regards,
    Bill
  • Thank you Bill for helping us.

    So far we had a workaround via an FPGA and an external PHY, and we would really love to finally use the Keystone peripherals (same applies to SPI, …).

    The open point is:

    Why _217 and which MODE qualifies for DCAN external access.

    I was trying to find information on this in the reference_manual or the internet, but wasn’t successful. Would be great if you can send me a link to this information.

     

    Cheers, MotorControl

  • Hi MotorControl,

    In the data manual, you will find the information on the default mode setting for each pin in table 4-1, Pin Attributes. For pin P5, the ball muxmode selected at reset is defined as mode 3 which is the GPIO_56 function.

      

    Table 4-28 in the data manual shows the pin muxmodes available for each pin and defines the PADCONFIG register used to define the muxmode that is active.

    The details for the PADCONFIG registers and all the other registers for the device are found in the K2G Technical Reference Manual. Table 5-468 shows the fields found in each of the PADCONFIG registers. The mode is selected using bits 3-0. 

    The reset values for each of the PADCONFIG registers is shown in table 5-5. The default value for PADCONFIG_127 is 0x00060003 which defines the reset value for the muxmode as 3. As defined in the tables in the data manual, this selects the GPIO_56 function. 

    As part of the initialization of the part, all the PADCONFIG registers should be updated based on the way the pin is used in your design. Unfortunately, it's not possible to define all this information in one document but we've tried to provide the majority in the data manual. 

    Regards,

    Bill