Dm388 Nand Boot always shows "CCCCCCCCCCCCC"

Add.....
We have modified and checked the uboot_source_code to support MX30UF2G28AB.
In SD_boot_mode,we can write u-boot.bin/ u-boot.min.nand/uImage into nand device.
And we read and verify u-boot.bin/ u-boot.min.nand/uImage from nand device. It is OK.

Hi user1403821,

user1403821 said:

When we set the boot_mode for nand boot,it cannot Nand boot. (It only shows “CCCCCC…” message).

This means that ROM code does not find valid boot image in NAND and proceed to the next boot option, which should be UART. Please check your device TRM, ROM code chapter, NAND section. There you should find what NAND chips are supported for that device and how NAND should be configured to be recognised by the ROM code as a valid boot source.

user1403821 said:

in our product ,we use 8bit-2Gb Nand device.

Have you switch from 16bit NAND to 8bit NAND in the GPMC config register?

BR
Pavel

Dear pavel

"Have you switch from 16bit NAND to 8bit NAND in the GPMC config register?"

Yes,we have.

We have modified and checked the uboot_source_code to support MX30UF2G28AB.

And In SD_boot_mode,We can write/read the MX30UF2G28AB. Then verify it, it is OK.

PS: in our case boot mode setting => boot[12]=0, boot[4:0]=0x13

About "TRM, ROM code chapter, NAND section", Do you mean chapter 4.7.3 and  table 4-14?

The ID of the MX30UF2G28AB seems to be supported.(MID=0xC2,Device ID=0xAA)

However, we use an oscilloscope to observe signals, I think it should be using ONFI_Mode(the MX30UF2G28AB support ONFI)

And it  read only 2k bytes after reading onfi parameter, then retry again later abandoned............ 

user1403821,

user1403821 said:

About "TRM, ROM code chapter, NAND section", Do you mean chapter 4.7.3 and  table 4-14?

I do not have the DM388 TRM at my side, but looking into the most close TRM (DM814x TRM), yes these are the chapter and table I mean.

Have you check DM388 datasheet, section 4.2.2 NAND Flash Boot? Make sure you are using these pins exactly.

Are you using BCH8 ECC when flashing the u-boot (u-boot.min.nand and u-boot.bin) into NAND?

Are you building the correct 1st stage bootloader (u-boot.min.nand)? Build with ti813x_evm_min_nand?

Are you using the latest u-boot code base?

- in case you are using PSP

- in case you are using IPNC RDK

See also if the below wiki pages will be in help:

Regards,
Pavel

Have you checked the actual bootmode of your device?
That is, though you set you pull up/down register on you PCB, the register value or other things make the bootmode mode value latched in chip is not the same one as the one you set by resister.
I would suggest:
1. Use strong pull in/up
2. Use the boot sequence that comes w/ UART firstly and following the NAND device. When the UART boot timeout, it should automatically go to NAND boot.

However, there might be a situation that there is something wrong when you flash the NAND. Suggest you verify the bootmode first.

BR,
Eason

Dear Pavel & Eason

Thanks for help us!!

about question:
"Are you using BCH8 ECC when flashing the u-boot (u-boot.min.nand and u-boot.bin) into NAND?"

Yes. We can write/read the MX30UF2G28AB with stage-2 U-boot in SD_BOOT_MODE.
And verify(u-boot.min.nand and u-boot.bin), they are OK.

"Are you building the correct 1st stage bootloader (u-boot.min.nand)? Build with ti813x_evm_min_nand?"

Yes.We use the same 1st stage bootloader (u-boot.min.nand) to write the nand flash of the DM388_IPNC EVB.
Then we set the boot_mode of the DM388_IPNC EVB to Nand_boot_mode(HW setting) and boot it.
It is OK.So I think 1st stage bootloader is correct.
PS.....u-boot can auto-detect the bus width of the nand flash.
DM388_IPNC EVB Nand Bus Width= 16 bit
Our Nand Bus Width= 8 bit

"Are you using the latest u-boot code base?"
Yes. It is base IPNC RDK3.8.0

"Have you checked the actual bootmode of your device?"
Yes. I set boot_mode[12]=0 and boot_mode[4:0]=0x13 (Set it at Chipset HW PIN).

finally,about the suggest
1. strong pull in/up .....
2.change to another boot_mode....

I will try them.....


Thank you for support us.........
Best Regards.

Rock Kao

Dear Pavel & Eason

Currently we have previously confirmed that all recommendations and uboot may need to be modified where all done to confirm and modify.
But it still only show ccccccc.

This is the result of the original 16-bit Nand oob-layout before we modify

16-bit Nand ECC layout
bad block mask=2 bytes
ECC bytes=14
ECC step=4
OOB total size=64 bytes

OOB:
FF FF 91 E0 F9 57 77 FA 
04 C3 9F 91 FC 02 43 00
36 3d 23 5d 77 2d 6f 30
64 3e 22 dd 10 00 26 79
f2 72 ad bf 90 c1 0f cc
b5 c8 f1 00 e1 bd a6 a8
86 69 90 1d 18 93 66 2f
1a 00 FF FF FF FF FF FF

Only correcting bad-block mask (for 16 bit-Nand "FFFF" => for 8 bit-Nand "FF")

8-bit Nand ECC layout
bad block mask=1 byte
ECC bytes=14
ECC step=4
OOB total size=64 bytes

OOB:
ff 91 e0 f9 57 77 fa 04
c3 9f 91 fc 02 43 00 36
3d 23 5d 77 2d 6f 30 64
3e 22 dd 10 00 26 79 f2
72 ad bf 90 c1 0f cc b5
c8 f1 00 e1 bd a6 a8 86
69 90 1d 18 93 66 2f 1a
00 ff ff ff ff ff ff ff

This is what we refer to "DM38x DaVinci ™ Digital Media Processors (trm) p.832 ~ 833" results corrected

8-bit Nand ECC layout with SPEC DEFAULT
bad block mask=1byte
ECC bytes=13
ECC step=4
OOB total size=64 bytes

OOB:
ff 91 e0 f9 57 77 fa 04
c3 9f 91 fc 02 43 36 3d
23 5d 77 2d 6f 30 64 3e
22 dd 10 26 79 f2 72 ad
bf 90 c1 0f cc b5 c8 f1
e1 bd a6 a8 86 69 90 1d
18 93 66 2f 1a ff ff ff
ff ff ff ff ff ff ff ff

Hardware is no problem and we have to modify two 8-bit obb-layout for testing.
Results are not.

Will be able to give us any suggestions?

P.S

We are using mx30uf2g28ab(support ONFI)

At NAND_boot mode, I'm sure there dm388 have detected nand support ONFI.

Then start reading nand_data.

But dm388 only read one page (2Kbyte + OOB). It ended.

1st_stage_uboot_size is 96Kbytes

Hi ,
Are you using the default boot image?

Have you any tried:
- Flash the NAND by UART
- Flash the NAND by CCS
- Flash the NAND by SD, then read out the image to DDR and run

I just want to check
- if the boot image is correct
- if the address you flashed to is correct

BR,
Eason