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Problem with Leopard Imaging Camera and LCDK6748

I am using LCDK6748 development board and I want to connect  LI-CAM-OV5653-P33.

This camera has to use BT.1120 mode with operating clock at 74.25MHz.

I am using vpif_lcd_loopback example in Starware.

I think I need to change the pixel resolution of the camera and the driver function.

Those are my changes:

#define CAPTURE_IMAGE_WIDTH (2592)
#define CAPTURE_IMAGE_HEIGHT (1944)

void VPIFCaptureModeConfig(unsigned int baseAddr, unsigned int mode, unsigned int sdChannel, unsigned int rawWidth, VPIFVbufParam* buf)
{ /*
typedef struct vbufParam
{
unsigned int sav2eav;
unsigned int eav2sav;
unsigned int vsize;
unsigned int l1;
unsigned int l3;
unsigned int l5;
unsigned int l7;
unsigned int l9;
unsigned int l11;
} VPIFVbufParam;
*/
if(mode==VPIF_480I)
{
if(sdChannel==VPIF_CHANNEL_0)
{
HWREG(baseAddr + C0HCFG) = (268 << VPIF_C0HCFG_EAV2SAV_SHIFT) | (1440 << VPIF_C0HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C0VCFG0) = (4 << VPIF_C0VCFG0_L1_SHIFT) | (20 << VPIF_C0VCFG0_L3_SHIFT);
HWREG(baseAddr + C0VCFG1) = (264 << VPIF_C0VCFG1_L5_SHIFT) | (266 << VPIF_C0VCFG1_L7_SHIFT);
HWREG(baseAddr + C0VCFG2) = (283 << VPIF_C0VCFG2_L9_SHIFT) | (1 << VPIF_C0VCFG2_L11_SHIFT);
HWREG(baseAddr + C0VSIZE) = 525 << VPIF_C0VSIZE_VSIZE_SHIFT;
}
if(sdChannel==VPIF_CHANNEL_1)
{
HWREG(baseAddr + C1HCFG) = (268 << VPIF_C1HCFG_EAV2SAV_SHIFT) | (1440 << VPIF_C1HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C1VCFG0) = (4 << VPIF_C1VCFG0_L1_SHIFT) | (20 << VPIF_C1VCFG0_L3_SHIFT);
HWREG(baseAddr + C1VCFG1) = (264 << VPIF_C1VCFG1_L5_SHIFT) | (266 << VPIF_C1VCFG1_L7_SHIFT);
HWREG(baseAddr + C1VCFG2) = (283 << VPIF_C1VCFG2_L9_SHIFT) | (1 << VPIF_C1VCFG2_L11_SHIFT);
HWREG(baseAddr + C1VSIZE) = 525 << VPIF_C1VSIZE_VSIZE_SHIFT;
}
}
if(mode==VPIF_HD)
{
if(sdChannel==VPIF_CHANNEL_0)
{
HWREG(baseAddr + C0HCFG) = (272 << VPIF_C0HCFG_EAV2SAV_SHIFT) | (1920 << VPIF_C0HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C0VCFG0) = (1 << VPIF_C0VCFG0_L1_SHIFT) | (42 << VPIF_C0VCFG0_L3_SHIFT);
HWREG(baseAddr + C0VCFG1) = (1122 << VPIF_C0VCFG1_L5_SHIFT) | (564 << VPIF_C0VCFG1_L7_SHIFT);
HWREG(baseAddr + C0VCFG2) = (603 << VPIF_C0VCFG2_L9_SHIFT) | (1121 << VPIF_C0VCFG2_L11_SHIFT);
HWREG(baseAddr + C0VSIZE) = 1125 << VPIF_C0VSIZE_VSIZE_SHIFT;
}
if(sdChannel==VPIF_CHANNEL_1)
{
HWREG(baseAddr + C0HCFG) = (272 << VPIF_C0HCFG_EAV2SAV_SHIFT) | (1920 << VPIF_C0HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C0VCFG0) = (1 << VPIF_C0VCFG0_L1_SHIFT) | (42 << VPIF_C0VCFG0_L3_SHIFT);
HWREG(baseAddr + C0VCFG1) = (1122 << VPIF_C0VCFG1_L5_SHIFT) | (564 << VPIF_C0VCFG1_L7_SHIFT);
HWREG(baseAddr + C0VCFG2) = (603 << VPIF_C0VCFG2_L9_SHIFT) | (1121 << VPIF_C0VCFG2_L11_SHIFT);
HWREG(baseAddr + C0VSIZE) = 1125 << VPIF_C0VSIZE_VSIZE_SHIFT;
}

}

if(mode==VPIF_CAPTURE_RAW)
{
/* TBD */
}
if(mode==VPIF_NONSTANDARD)
{
/* TBD */
if(sdChannel==VPIF_CHANNEL_0);
if(sdChannel==VPIF_CHANNEL_1);
}

/* TBD */
}

I compile my code, but it does not work.

Any idea?? Do I have to change more code lines??

Thank you

Kind Regards

  • Hi Javi,

    Please don't create muliple posts for the same problem/requirement.

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/365811/1297301.aspx#1297301

    Surely, we would help you out.

  • Hi,

    Thanks for your post.

    For sure, BT. 1120 format will support HDTV input and output for VPIF, but it needs an input clock source of 74.25MHz. Kindly ensure the input clock source. Also, the values defined in the macros CAPTURE_IMAGE_WIDTH & CAPTURE_IMAGE_HEIGHT are very high resolution pixel array and i don't think, VPIF will support this resolution. Try adjusting the pixel array to HD resolution size and appropriately, tune the capture image height and width, so that, the VPIF would support the compatible HD input resolution.

    I walked through the Cn register configuration of BT. 1120 mode for VPIF HD mode, but i think, you should also modify appropriately the VPIF driver functionality code for HD input register configuration to take effect on the application code. Please ensure the VPIF driver code is appropriately changed to support VPIF HD input resolution

    Thanks & regards,

    Sivaraj K

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