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failed entering retention mode

ranchu
Guru 20755 points
Other Parts Discussed in Thread: OMAP3530

Hello,

I'm using OMAP3530 with custom board. I have enabled all power mode features as described in PSP wiki, but it still fails to enter any state different from state0.

~ # cat /dbg/pm_debug/count
usbhost_pwrdm (ON),OFF:0,RET:0,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
sgx_pwrdm (OFF),OFF:1,RET:0,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
per_pwrdm (ON),OFF:0,RET:0,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
dss_pwrdm (ON),OFF:0,RET:3,INA:4,ON:7,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
cam_pwrdm (RET),OFF:0,RET:1,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
core_pwrdm (ON),OFF:0,RET:0,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0,RET-MEMBANK2-OFF:0
neon_pwrdm (ON),OFF:0,RET:0,INA:0,ON:1,RET-LOGIC-OFF:0
mpu_pwrdm (ON),OFF:0,RET:0,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0
iva2_pwrdm (RET),OFF:0,RET:1,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0,RET-MEMBANK2-OFF:0,RET-MEMBANK3-OFF:0,RET-MEMBANK4-OFF:0
per_clkdm->per_pwrdm (11)
usbhost_clkdm->usbhost_pwrdm (3)
cam_clkdm->cam_pwrdm (0)
dss_clkdm->dss_pwrdm (2)
core_l4_clkdm->core_pwrdm (12)
core_l3_clkdm->core_pwrdm (4)
d2d_clkdm->core_pwrdm (0)
sgx_clkdm->sgx_pwrdm (0)
iva2_clkdm->iva2_pwrdm (0)
neon_clkdm->neon_pwrdm (0)
mpu_clkdm->mpu_pwrdm (0)
prm_clkdm->wkup_pwrdm (0)
cm_clkdm->core_pwrdm (0)

On trying to enable uart as wakeup source I get the following:

echo enabled >  /sys/devices/platform/omap/omap_uart.2/power/wakeup

cat  /sys/devices/platform/omap/omap_uart.2/power/wakeup

#> disabled


echo 1 >  /sys/devices/platform/omap/omap_uart.2/sleep_timeout

console hangs

 

Thanks for any suggestions, 

Ran

  • 0
    TI__Guru 65405 points

    Hi Ran,

    As I see in the cat /dbg/pm_debug/count output that some subsystems went in retention mode.

    I'm using a OMAP3530EVM board with dvsdk 4.03 with the corresponding to this board 'defconfig' and test the uart wakeup source configuration. The uart wakeup source is enabled by default for all uarts and can be set to disable/enable properly.

    The uart sleep timeout for all uarts is 0 by default but it can be changed to various values (1, 5 and 10 seconds) without any issues.

    I only can guess for the reason for the issue with the behavior of your board but it should be have some problem with the regulators.

    Also as additional check try to check the off mode setting by:

    # cat /debug/pm_debug/enable_off_mode

    BR

    Tsvetolin Shulev

  • 0 in reply to Cvetolin Shulev-XID
    Guru 20755 points

    Hi Cvetolin ,

    Thanks for the suggestions.

    I managed to get into retention with cpuidle. I had to add config_suspend , and to enable uart sleep for all uarts (not just the console).
    Though I see that the picture on screen is still being shown .I wander how omap can get into retention while screen is on.
    When suspending the system, the screen shut down.

    Thanks,

    Ran

  • 0 in reply to ranchu
    TI__Guru 65405 points

    Hi Ran,

    I'm focusing on the "how omap can get into retention while screen is on". The whole system con not to be in retention while the DSS subsystem (screen) is on. In case of the dss is active the mpu and core must be active too because there is dependences between subsystems. Both are necessary to refresh the frame buffer. Therefore when suspending the system, the screen shut downs.

    There is one more prove in the pm34xx.c file that the system could not be in sleeping state but the screen to be active. There is a verification for all subsystems be in suspend the decide the system is suspended.

    BR

    Tsvetolin Shulev