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Powering TMS320C6748

Hi,

I am designing a power supply for the above DSP. I have got several questions.

From my understanding the powering up sequence is: CVDD -> DVDD1.8 -> DVDD3.3

1. If individual regulators are used for each of these rails can the sequencing be done by an external controller. ie enable CVDD wait 1ms enable DVDD1.8 etc?

2. To save power can static core logic supplies (RVDD etc), DVDD1.8 and DVDD3.3 be switched off when not in use? i.e. Keep CVDD with the core is in sleep mode. This way the state is held.

3. On wake-up RVDDs and DVDD's are brought up in sequence? Is this ok?

4. By switching off Static core logic supplies and DVDD's would there be a significant power reduction?


5. Is it ok to use MOSFET switches to gate the power supplies?

Look forward to your answers.

BR

Manjula

  • Hi Manjula,

    Please see our response below ….

    1. From my understanding the powering up sequence is: CVDD -> DVDD1.8 -> DVDD3.3

    TI: Yes

    1. If individual regulators are used for each of these rails can the sequencing be done by an external controller? ie enable CVDD wait 1ms enable DVDD1.8 etc?

    TI: Up to you either you can go with individual regulator and do a sequencing with external controller or you can use TI’s TPS650250RHBR device for complete power management mainly recommended for low power design, please refer the LCDK C6748 schematics for wiring details.

    1. 2. To save power can static core logic supplies (RVDD etc), DVDD1.8 and DVDD3.3 be switched off when not in use? i.e. Keep CVDD with the core is in sleep mode. This way the state is held.

    TI: C6748 has many features to reduce the static power by extensive use of clock-gating, using the Power Sleep Controller (PSC), you can lower the core VDD if the device can be operated at lower frequency. There is provision to remove power completely from the core and just keep the RTC module powered up, which allows a lower powered standby mode for applications that only need the real time clock operating for prolonged periods of no active processing state. Please refer chapter 9 in SPRUH79A power management section for more details. “Look for section 9.7 RTC-Only Mode” in page No: 197 in C6748 technical reference manual”

    1. 3. On wake-up RVDDs and DVDD's are brought up in sequence? Is this ok?

    TI: Yes

    1. 4. By switching off Static core logic supplies and DVDD's would there be a significant power reduction?

    TI: Yes, off course

    1. Is it ok to use MOSFET switches to gate the power supplies?

    TI: Yes, you can but please make sure you meet the below selection criteria, Turn-on Voltage • Drain-Source Breakdown Voltage • Gate-Source Breakdown Voltage • On-Resistance (RDSon) • Maximum Current • Package (Size) • Cost

    Regards

    Antony 

  • Hi Antony

    Thank you for the comprehensive reply. I have got a another question. I want to run some of the DVDD3318 supplies at 2.8V. Is this ok. Will the LVTTL levels scale accordingly? I have to interface with a third party board which runs at 2.8V TTL levels and it would be handy not to use voltage translators and run the DVDD3318 supplies at 2.8V so that they can be interfaced directly.

    Look forward to your valued advice.

    Best regards

    Manjula

  • Manjula,

    Our internal I/O cells are required to bias the gates at 1.8/3.3V.Any functions or specs not specifically listed in the datasheet are not guaranteed to operate the device under normal condition.

    Moreover we have not characterized the device under that operation condition

    Please use the external voltage translator http://www.ti.com/lit/an/scea035a/scea035a.pdf

    Regards

    Antony

  • Hi Antony,
    I understand TI's reply here as you can only vouch for what is tested. However since these are CMOS devices the the LV logic levels should scale with the supply voltage within a reasonable range ie +/-15%. I like your opinion on this and won't hold you to it.

    Thanks

    Manjula
  • Manjula,

    We have some operating marginality for these supply rails too…as mentioned in the datasheet .But if you power the (DVDD3318_A) at 2.8V, the internal supply detector may miss the known (1.8/3.3V) configuration (Values) found in the  detection logic and the user input  , may ended up not releasing the reset .

    You can play around with supply voltage rails using the general logic device but not with the Systems-on-Chip due to so many internal dependencies.

    Hope this helps

    Regards

    Antony