PINMUX10_3_0 Setting at NOR Boot of C6746

Hi Tsutomu,

Thank you for bringing this to our attention. I have checked the BootROM source for this device. As you mentioned your customer seems to be running into what seems to be a ROM bug. As you mentioned  the ROM is using the following pinmux settings for NOR boot

DEVICE_pinmuxControl(5 ,0xFF000000,0x11000000); // EMA_BA[1],EMA_BA[0]

 DEVICE_pinmuxControl(9 ,0xFFFFFFFF,0x11111111); // EMA_D[7:0]

 DEVICE_pinmuxControl(10,0xFFFFFFFF,0x11111111); // EMA_A[23..16]

 DEVICE_pinmuxControl(11,0xFFFFFFFF,0x11111111); // EMA_A[15..8]

 DEVICE_pinmuxControl(12,0xFFFFFFFF,0x11111111); // EMA_A[7..0]

 DEVICE_pinmuxControl(7 ,0x00FF000F,0x00110001); // nEMA_OE, nEMA_WE, nEMA_CS[2]

The correct setting should have been

DEVICE_pinmuxControl(10,0xFFFFFFFF,0x11111110); // EMA_A[22..16]

The bootROM pin puts the pin in undefined state..However since the bootROM code can`t be modified the customer will need to change this pinmux post boot in order to use it as a GPIO pin or the other option would be to use a different pin as GPIO.

Regards,

Rahul

Hi Tsutomu,

Based on our observations, I discussed this with some engineers internally regarding configuration of this pin and I have some update to share with your customer:

OMAPL138 has maximum addressable space of 32MB to interface with an external NOR. You can take a look at the recommended way of connecting 32MB NOR flash to the device on the following wiki:
processors.wiki.ti.com/.../Connecting_NOR_Flash_to_OMAP-L138

Note: 1. A0 on the memory is ‘reserved for future use’, only A1-A24 are valid. This means that EMA_BA0 should be connected to A1 on the memory and EMA_A[22:0] should be connected to the memory A[24:2].

EMA_BA0 and EMA_A[22:0] will gives us the required 24 address bits we need to get to 32MB (2^24 addresses * 2 bytes/address) and hence there is no need for EMA_A[23] line. So the recommended way for this interface is to leave the pin unconnected. However from design perspective that pin is still designed for acting like a address line so by configuring that pin the bootROM is configuring it as a address line for EMIF and so the pin acts as a bi-directional pin but since it is never driven it will always remain at 0 unless you configure it as GPIO/MMCSD line by changing the pinmux.

Regards,
Rahul