This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Fetch packet exception

Other Parts Discussed in Thread: SYSBIOS

hi,

Memory_alloc() call in my program cause the following issue - 

A0=0x8 A1=0x0
A2=0x1 A3=0xa013a198
A4=0xd7e7438d A5=0x1
A6=0x8 A7=0x0
A8=0x0 A9=0x8df763
A10=0x1 A11=0xd7e7438d
A12=0xd7e7438d A13=0xa0137268
A14=0x0 A15=0x0
A16=0xa0002fe0 A17=0x0
A18=0xa0002fd8 A19=0x0
A20=0x0 A21=0x0
A22=0x0 A23=0x0
A24=0x0 A25=0x0
A26=0x0 A27=0x2005000
A28=0x0 A29=0x0
A30=0x80000 A31=0x8
B0=0xd7e7438d B1=0x0
B2=0x0 B3=0x8bdaa4
B4=0x1 B5=0xffffffff
B6=0xa0137268 B7=0xa013b698
B8=0x0 B9=0x0
B10=0x0 B11=0x0
B12=0x0 B13=0x0
B14=0xc0dd000 B15=0xa0002fc0
B16=0x0 B17=0x4578b849
B18=0x0 B19=0x0
B20=0x0 B21=0x2e1
B22=0x2e10000 B23=0x0
B24=0x0 B25=0x3000
B26=0x3000 B27=0x0
B28=0x0 B29=0x2
B30=0x0 B31=0x0
NTSR=0x1000f
ITSR=0xf
IRP=0x8a2d3a
SSR=0x0
AMR=0x0
RILC=0x0
ILC=0x0
Exception at 0xfffffffe
EFR=0x2 NRP=0xfffffffe
Internal exception: IERR=0x3
Instruction fetch exception
Fetch packet exception
ti.sysbios.family.c64p.Exception: line 255: E_exceptionMin: pc = 0xfffffffe, sp = 0xa0002fc0.
To see more exception detail, use ROV or set 'ti.sysbios.family.c64p.Exception.enablePrint = true;'
xdc.runtime.Error.raise: terminating execution

I have tried increasing my heapsize and also checked my stack limit using ROV . It looks fine. 

When i comment my GIGE initialization function - code runs fine . 

gige_Initialization function- 

{
	Int32	   i;
  	UInt32     coreNum;

  	volatile UInt32     testComplete=FALSE;

    /* Get the core number. */
    coreNum = CSL_chipReadReg(CSL_CHIP_DNUM); 


    System_printf ("************************************************\n");
    System_printf ("*** GiGE Intialization Started on Core %d ***\n",coreNum);
    System_printf ("************************************************\n");

    /* Init internal cycle counter */
    TSCL = 1; 
    
    /* Disable L1 and L2 Cache */
    CACHE_wbAllL1d (CACHE_WAIT);
    CACHE_setL1DSize(CACHE_L1_0KCACHE);
    CACHE_setL1PSize(CACHE_L1_0KCACHE);
   #ifndef L2_CACHE
    CACHE_setL2Size(CACHE_0KCACHE);
    #endif

    /* Core 0 does the global initialization */
    if(!coreNum)
    {
        /* Enable PASS power domain */
        passPowerUp();        
        
        /* Initialize the components required to run the example:
         *  (1) QMSS
         *  (2) CPPI
         *  (3) Ethernet switch subsystem + MDIO + SGMII
         */
        /* Initialize QMSS */
        if (Init_Qmss () != 0)
        {
            System_printf ("QMSS Global init failed \n");
            BIOS_exit (-1);
        }
        else
       {
            System_printf ("QMSS successfully initialized \n");
        }

//        /* Initialize CPPI */
        if (Init_Cppi () != 0)
        {
            System_printf ("CPPI init failed \n");
            BIOS_exit (-1);
        }
        else
        {
            System_printf ("CPPI successfully initialized \n");
        }

        /* Init PA LLD */
        if (Init_PASS () != 0)
        {
            System_printf ("PASS init failed \n");
            BIOS_exit (-1);
        }
        else
        {
            System_printf ("PASS successfully initialized \n");
        }

       /* Initialize the CPSW switch */
        if (Init_Cpsw () != 0)
        {
            System_printf ("Ethernet subsystem init failed \n");
            BIOS_exit (-1);
        }
        else
        {
            System_printf ("Ethernet subsystem successfully initialized \n");
        }

        /* Setup Tx */
        if (Setup_Tx () != 0)
        {
            System_printf ("Tx setup failed \n");
            BIOS_exit (-1);
        }
        else
        {
            System_printf ("Tx setup successfully done \n");
        }

    /* Setup Rx */
    if (Setup_Rx () != 0)
    {
       System_printf ("Rx setup failed \n");
       BIOS_exit (-1);
    }
    else
    {
        System_printf ("Rx setup successfully done \n");
    }

    /* Setup PA */
    if (Setup_PASS () != 0)
    {
        System_printf ("PASS setup failed \n");
        BIOS_exit (-1);

    }
    else
    {
        System_printf ("PASS setup successfully done \n");
    }
    
    globalCfgDone=TRUE;

  }
    System_printf ("Global Config_Done..Waiting for attached cores...\n");

    while(globalCfgDone == TRUE)
        SYS_CACHE_INV ((void *) &globalCfgDone, 128, CACHE_WAIT);


    System_printf ("GIGE INTIALIZATION IN ALL CORES COMPLETED\n");

}

The QMSS initialization  & IPC module uses the SHARED_REGION0  !! Is it due to which the conflict occurs ? 

regards ,

vinodh 

  • Environment Information :

    CCS Version : 5.5

    MCSDK version : 2.2.1.03

    SYSBIOS version : 6.35.4.50

    IPC version : 1.25.03.15

    Compiler : c6000_7.4.4
  • Vinodh,

    Have you tried setting a breakpoint on Memory_alloc() and then stepping to see where the exception occurs?  The B3 register shows “0x8bdaa4” – does this correspond to where the Memory_alloc() function resides in memory?

    And have you tried a process of elimination, commenting out portions of that initialization code to see when the exception doesn’t occur?

    I don’t know the background of that initialization code… but it looks like there is a mix of different types of cache APIs (“CACHE_*()” and a “SYS_CACHE_INV()”), plus SYS/BIOS has its own “Cache” module.  Not knowing more, it seems like these different sets of cache APIs may conflict with one another.  Have you looked to see if these different APIs are appropriate and compatible?

    Scott