• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 102 subscribers
  • Views 621 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Shared RAM Concerto TI-RTOS

Inaki Martinez d Ilarduya
Prodigy 90 points
Other Parts Discussed in Thread: F28M36P63C2

Hello,

I need to exchange data from the C28 to M3 and viceversa in the concerto F28M36P63C2 and I don't know exactly how to use the shared RAM. I have modify the .cmd file to add the SHAREDRAM memory but what I don't know is how i should give the control of the memory to the c28 core.

Many thanks

  • 0
    TI__Mastermind 30830 points
    I am very unfamiliar with Concerto shared RAM usage. However, have you seen this related post that may help you?:

    e2e.ti.com/.../1516180

    Alan
  • 0
    Intellectual 405 points

    Hello Inaki,

    I have made the following steps and worked out for my F28M35. 

    1. Make the includes and definitions as below:

    #include "driverlib/ram.h"

    #define C28_MASTER 1

    2. I have selected the last block for share the RAM (S7), once the BSS section uses both C0-3 and S0-7 RAM. So, my .cmd looks like this:

    MEMORY

    C03SRAM (RWX) : origin = 0x20000000, length = 0x8000 // 32768 bytes
    S06SHRAM (RWX) : origin = 0x20008000, length = 0xE000 // 57344 bytes
    S7SHRAM (RWX) : origin = 0x20016000, length = 0x2000 // 8192 bytes

    SECTIONS

        SHARERAMS7  : > S7SHRAM

    3. Assign your variable to the shared address as:

    #pragma DATA_SECTION(<your variable on M3>,"SHARERAMS7");

    4. Pass on M3 the control of this block to C28 as:

        RAMMReqSharedMemAccess(S7_ACCESS,C28_MASTER);

    To ensure everything will works, I also did this in C28:

    1. Inlude the header:

    #include <F28M35x_Ram.h>

    2. Pass the control for writing the memory block to C28 as:

    RAMRegs.CSxMSEL.bit.S7MSEL = 1; // Select C28 as master of this block
    RAMRegs.CSxSRCR2.bit.CPUWRPROTS7 = 0; // Allow C28 to write

    3. Assign your variable to be passed to M3

    #pragma DATA_SECTION(<your variable on C28>,"SHARERAMS7");

    That's it!

    Good luck!

    Bests,

    Douglas