Greetings,
We just had some HDMI compliance tests run on our unit which incorporates your TPB12S016. We failed DDC/CEC Line Capacitance and Voltage. The Capacitance is too high 650p on SDA and 950p on SCL.
While I do not have a LCR bridge that can be set per the test procedure (bias 2.5V, AC voltage 3.5V, Freq 100K) using my LCR bridge (10K, 1V, no bias) I measure a total Jig+unit capacitance of ~30p without the chip, and 120/190p with the chip (Jig capacitance ~12p).
We are connected as a sink, SDA/SCL go to port B. My interpretation of your data sheet shows input C at 15p. My measured connector/track capacitance is ~18p, so 18p + your 15p would be 33p and within the speced 50p max...
Any feedback would be helpful
Thanks
Ed