XIO2001 PCI Bus Absolute Max Ratings & Electrical Characteristics

Chun Ling Chen

Other Parts Discussed in Thread: XIO2001

Hi. I am looking at the XIO2001 device datasheet below.

Question:

1) Based on the side note circled in red below, what is the specified extended periods (> ? ns) mentioned here.

2. The device has internal IO clamp diode to limit the overshoot & undershoot scenario, therefore the device DIE is protected & should not see the excessive input voltage? Let me know if my understanding is correct.

Hope to hear.

Thank you for the support!

Chun Ling Chen

over 8 years ago

0 Elias Villegas M. over 8 years ago

TI__Guru* 76130 points

Hello,
I am looking for some destructive testing results, I will get back here in a couple of days if I find something.
Regards

0 Chun Ling Chen over 8 years ago in reply to Elias Villegas M.

Prodigy 200 points

Thank you. Appreciate the support!

regards,

CL Chen

0 Chun Ling Chen over 8 years ago in reply to Chun Ling Chen

Prodigy 200 points

Hi Elias , Do you have any updates for my questions posted here. Thank you.

0 Elias Villegas M. over 8 years ago in reply to Chun Ling Chen

TI__Guru* 76130 points

Not yet, I'm still waiting for information from characterization team.

Regards

0 Chun Ling Chen over 8 years ago in reply to Elias Villegas M.

Prodigy 200 points

Do you have any updates on the questions here?
Thank you.

0 Elias Villegas M. over 8 years ago in reply to Chun Ling Chen

TI__Guru* 76130 points

Hello,

I'm sorry but we don't have destructive analysis data, Customer will have to stick to the MAX numbers.

Regards

0 Mike Perkins over 8 years ago in reply to Elias Villegas M.

Intellectual 565 points

Elias Villegas M. said:

Hello,

I'm sorry but we don't have destructive analysis data, Customer will have to stick to the MAX numbers.

Regards

Doesn't that rather undermine the validity and verification of the Absolute Max Ratings?

0 Chun Ling Chen over 8 years ago in reply to Elias Villegas M.

Prodigy 200 points

Thanks for the update Elias.
What about the second question related to the clamping diode.
Would like to seek further clarification on how they could clamp down excessive voltage inputs eg overshoot & undershoot.

regards,
CL Chen

0 Elias Villegas M. over 8 years ago in reply to Chun Ling Chen

TI__Guru* 76130 points

Hello,

The point of that statement is to connect PCIR to the correct rail so that the PCI bus I/O is biased properly.

5V PCI signaling is ”excessive” compared to 3.3V PCI signaling.

Regards

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XIO2001 PCI Bus Absolute Max Ratings & Electrical Characteristics