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TXS0206 Logic Level

Other Parts Discussed in Thread: TXS0206

Hi,


I am planning to use TXS0206 for interfacing a 1.8V processor with a 3.3V SD card interface. But when I was checking the logic levels between those, I saw conflicts between them.

Processor Logic Level (1.8V):

VIH = 0.65*VCC, VIL = 0.35*VCC ;

VOH = 1.4V, VOL = 0.45V

TXS0206 Logic Level:

VIH = VCC-0.2, VIL = 0.15

VOH = 0.8*VCC, VOL = 0.4V.

SD Logic Level (3.3V):

VIH = 0.625*VCC, VIL = 0.25*VCC

VOH = 0.75*VCC, VOL = 0.125*VCC.

What can I do with this? Please help me out of this.

  • Moving to Translation forum for support.

  • Hi,

    For TXS0206, they are specific design for open-drain application. Thus, the circuits design is based on transmit gate architecture. When input is low, the transmit gate is on and low signal pass the transmit gate. There is a voltage drop between sides of the transmit gate. The value could be 100-200mV. Therefore, output voltage should be equal to input low voltage + dropped voltage and output voltage also is reignited as low. In general, 0.4V will be recognized low in 1.8V-3.6V supply on VCCB.

    This is the reason that Vil is 150 mV.

    If TXS0206 can not meet controller output low voltage. Could you please use SN74AVCA406E? It is direction controlled SD translaotor.

    Thanks

    Wei

  • Thank u Wei.

    From your above statement, what I understood is that if the VIL given to the input of TXS0206 is 0.45V the output VOL could be max 0.65V. Am I correct?

    Also I want to know how to meet the High voltage requirement. Please help me.

  • Hi,

    It could be 0.65V when input is about 0.4V. But if your input low logic is about 0.4V, my suggetion is to use SN74AVC406E.

    For TX0206, when input is high low logic, the transmit transitor will be swtiched off. The output will be pulled to hihg  by internal pull-up resistor.

    Thanks

    Wei

  • Hi Wei,


    I have decided to use SN74AVCA406EZXYR. But I am seeing assembly and routing issue with this. Minimum trace width should be 0.1mm and the clearance between trace and ball should be 0.1mm. So totally I need minimum 0.3mm air gap between the balls. If I take the minimum ball size of 0.25mm I will get only 0.25mm air gap.

    Please suggest me. Can I get this same part with TSSOP package?

    Thanks,

    Maharajan.

  • Could you send me your email address? I will share some layout information with you. My email is langwei@ti.com.

    Thanks

    Wei