Hello TI,
I'm playing with power saving modes of TLK110. I'm using my custom board, ~50m Cat5e cable and a router on the far end for this test.
I have written a short program, that sets all valid PWRBOCR[8:6] bits sequentally(10sec each), and during this I probed ethernet signals with a RIGOL DS1052E (single ended probes, 50MHz analog bw, 1Gs/s). I noticed, that this register works exactly the opposite way, as described. Here are the single-ended measured Vp-p values:
0b000->1.7V
0b001->1.3V
0b010->1V
0b011->0.7V
0b100->0.4V(connection lost, but it's not valid either)
I don't have any big-endian/little endian issues, because for example PHYSTS register works as expected. Maybe the datasheet and SLLA328 are incorrect?
Another question:
What is the function of VRCR[3:0] bits? The datasheet only says, that:
"Voltage Regulator Control This value should be ignored on read. To write to this register,
perform a read followed by a write with the desired value."
It is OK, that I have to read this first, if I would like to write it, but there is noting about the meaning of these bits...
Regards,
Attila
