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DP83848K: About REF_CLK of RMII

Lee, Sam
Expert 4965 points
Part Number: DP83848K

Hi team,

A customer, who uses DP83848N, asks a question on Artwork job of RMII mode. It needs only a ref_clk to X1. BW, does it need physical delay on the X1 path for the center alignment of data?

-. If yes, can you show some example?

-. If not, is there any other way to align the center?

Thanks,

Sam Le

 

  • 0
    TI__Mastermind 26320 points
    Hi Sam,

    Given RMII runs at slower clock of 50 MHz compare to RGMII ( 125Mhz) and data is sampled on rising edge only, this eases requirements for skew compare to RGMII which is DDR.

    Phy gives the data out on the rising edge of the clock and MAC samples it on the next clock cycle. Additional PCB level delays are not required for RMII.

    Regards,
    Geet