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DP83822I: How to avoid wrong configuration during power on reset?

Part Number: DP83822I

Hi team,

I have a question about the configuration of Ethernet PHY device could you please help me with it?

You know some of the operation mode of PHY is configured through some hardware strap pins. And the state of those pins are sampled and latched during power up reset. Meanwhile those strap pins also act as other functions and are connected to CPU pins. This introduces a potential issue: the state of the strap pins may be dominant by CPU pins and wrong state is sampled by PHY which result wrong configuration of PHY. How should customer handle this potential issue?

To avoid this issue, Customer tried to manually reset PHY device by issuing a RESET_N to PHY after CPU finished initialization. However they found the PHY was configured incorrectly in MII mode, instead of intended RMII mode. I think this is due to the reason I previously said. 

Customer corrected the configuration through MDIO register access, however the device cannot function properly even the configuration has bee corrected. Finally we found the problem was due to MDIO configuration was implemented after MAC initialization. The problem solved when we correct the MDIO register before MAC initialization. I cannot understand why PHY must be configured before MAC initialization?

Thank you,

John

  • Hi John,

    What happens during MAC initialization, does it involve changing the pin state of the RMII pins? What might be happening is that the after the MAC initialization, the RMII pins on the MAC might be changing state. When the PHY is reset, it samples a different value like you said in your post leading to difference in configuration.

    To mitigate this I would recommend putting the strap pins of the PHY, that are connected to the MAC, in a known state before issuing a reset signal to the PHY. That way the PHY will always sample a known voltage and get strapped in the correct mode.

    -Regards

    Aniruddha