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DS90CR288A: setup time

toshi-e2e
Genius 4760 points
Other Parts Discussed in Thread: DS90CR288A

Hi all,

There is about 1ns of an additional delay from RxCLK OUT (H -> L) to RxOUT when sending some specific patterns to DS90CR288A as below waveform.

Is this a normal phenomenon?

Is there a way to improve this phenomenon?

Case1:

Case:2

Regards,
Toshi

  • 0
    TI__Mastermind 29655 points
    Hi Toshi-san,

    Thanks for the waveforms, and sorry for the delay in response. I am not familiar with this type of phenomenon, and I am wondering if this is causing issues at the display side after the DS90CR288A? What is the difference in the setup time between the two situations? I don't anticipate that this should be a problem as long as the outputs are still within the guaranteed RSRC margin for both of these situations (minimum is 3.5 ns).

    Thanks,

    Michael
  • 0 in reply to Michael Lu (Santa Clara)
    Genius 4760 points
    Hi Michael-san,
    Thanks for your response.

    The wave form is being observed at the back of the 22-ohm DUMP resistance which leads to output of DS90CR288A.
    The setup time difference between the situations is the output pattern.
    The case 2 is like a high load output pattern.　Only Rx17 is changed from 1 to 0 and others are changed from 0 to 1.

    I understand that this should not be a problem as long as the outputs are still within the guaranteed RSRC margin.
    If you know, could you tell me a reason of the case 2?

    Regards,
    Toshi
  • 0 in reply to toshi-e2e
    TI__Mastermind 29655 points
    Hi Toshi-san,

    The only thing I can think of for Case 2 is that each parallel output may have some amount of pulse distortion for 1-to-0 or 0-to-1 transitions that is somehow data pattern dependent. Otherwise, I do not have any other thoughts, since there is nothing different with your setup other than the pattern itself.

    Thanks,

    Michael