TCA4311A: SDIN Distorsion

Hi,

I add the waveform when the TCA4311A is not connected.

The distortion is not looked at.

Best Regards,

Kuramochi

Hi
How is this situation?
Kuramochi

Hello Kuramochi-san,

I will look at this today and get back to you.

-Francis Houde

Hello Kuramochi-san,
I have a feq questions.
1) What is the problem that the customer is seeing?
2) Where in the circuit are they doing the insertion? Is it board to board or a wire harness? Is the problem they are seeing during hotplug or after everything is stabilized and connected?
3) From what I can see it seems like the SDA is working ok, my question is more about what is going on with your SCL? You have a wide pulse in the middle, what does the SCLin look like at the same time. Have them do recording of waveforms of both sides of the device (SCLin, SCLout, SDAin, and SDAout) when they see problems.
4) When I looked at the waveform where the TCA4311A isn’t connected, it looks funny to me. I assume Ch 2 (blue) is SCL, and it looks like an open drain signal. Channel 1 (yellow), it looks like a pushpull output. Can you verify what is going on there? Channel 1 and 2 have significantly different rise times, which implies either different pull up resistors or very different capacitive loading.
5) The TCA4311A is a pass fet architechture with Rise Time Accelerators (RTA), and other important circuitry to deal with stuck buss recover and hot plugging. What you see in the waveforms is a start of a slow rise then a fast rise, that means the RTA gets turned on.
6) Why did they mismatch the pull up resistors on the IN and OUT sides?
7) It apears that they either have a zener or tvs on the OUT side, do you have information about the capacitance of those devices. This will add capacitance to the loading of the bus, but hopefully not much.
If I can get a good problem definition with good waveforms, then I can help determine why you are having a problem. I need to know what the problem is. You haven’t clearly state that.
-Francis Houde

Hello Kuramochi-san,

Also, can you please explain what the goal of the design is so that I can make sure this is the correct part for you application.  

-Francis Houde

Hi Houde-san,

Thank you for you support.

OK, I confirm your questions for my customer.

1) What is the problem that the customer is seeing?

The problem is the distortion inside the following red rectangle.

Do you think that this symptom depends on the TCA4311A or customer's application?

Best Regards,

Kuramochi

Hello Kuramochi-san,
The distortion is due to RTA, but my guess is that is looks worse than it really is because you are probing the signal with a long ground lead and picking up noise too. Are they having communications issues?

I am a bit worried that the RTA aren't staying on long enough and that is why they see the dropping of the voltage as it continues to go towards the rail.

1) What is the capacitive loading???? Also, have them gone to stronger pull up resistors, like 4.7k ohms.

2) I also don't understand why the SCL and SDA lines looks so different. If they routed close to each other with similar routing widths then the signal sound be roughly the same. One signal looks like a push-pull driver (SDA) and the other looks like an open drain (SCL). Can they explain that?
-Francis Houde

Houde-san,

Thank you for your support.

I'm confirming your questions for the customer.

I let you know soon if I get answers.

I show the waveform when the pull-up resistors are 10kohm for your reference.

Best Regards,

Kuramochi

Hi Houde-san,

I add the information I get.

2) Where in the circuit are they doing the insertion? Is it board to board or a wire harness?

→Wire harness

Is the problem they are seeing during hotplug or after everything is stabilized and connected?

→everytime

3) From what I can see it seems like the SDA is working ok, my question is more about what is going on with your SCL?

You have a wide pulse in the middle, what does the SCLin look like at the same time.

→Repeat Start Condition.

Have them do recording of waveforms of both sides of the device (SCLin, SCLout, SDAin, and SDAout) when they see problems.

→I attach the waveforms.

4)When I looked at the waveform where the TCA4311A isn’t connected, it looks funny to me. I assume Ch 2 (blue) is SCL, and it looks like an open drain signal. Channel 1 (yellow), it looks like a pushpull output. Can you verify what is going on there? Channel 1 and 2 have significantly different rise times, which implies either different pull up resistors or very different capacitive loading.

→The capacitance of protection device is 4pF(typ).

Best Regards,

Kuramochi

Hi Houde-san,

How is this situation?

Kuramochi

How is this situation?

Hello Kuramochi-san,

I am at a bit of a loss as to why you are seeing SDAout with the severely deformed waveform. I think I need for information about their setup. 

1. You told me they were using a wire harness, but I need more information about the harness. What is type of wire? What is the capacitance/cm? length of wire? This will give me an estimate of capacitive loading. The gauge of wire will tell me the inductance/cm. If the wiring harness is long then we might be seeing reflections due Rise Time Accelerators (RTA). I don’t think that is the issue, but I want to make sure. The below waveform seems to have a very large amount of capacitance that the RTA can’t handle. You may need to significantly increase the pullup resistors or look at using stronger buffers that can handle the stronger pullups. Also, how are they capturing this waveform? It looks like a sloppy probe setup with lots of noise on the measurement.

2. What is the part number of the TVS? I want to see the information about standoff voltage and leakage current. I am worried that they TVS is conducted when you aren’t expecting. This might make it look, impedance wise, like a large capacitive load.

3.  You have only given me a hand drawn circuit, is there a schematic? I want to know if there is anything else on both sides of the buffer? Are there other buffers? Or just devices? I want to make sure there isn’t two devices fighting each other, like having two buffers with different static voltage offsets connected to the same node.

4.  I still don’t understand why the wavefom below has two significant different rise times? You said this was “the waveforms when TCA4311A is not connected”, does that mean it was bypassed by shorting SDA/SCLin and SDA/SCLout or the hardness was removed? Please clarify.

5.  Is their system no communicating properly? What is the problem? Just that they don’t like the waveform?

6.  What is the goal of the design? What is the application? You might be using the wrong part.

 It is difficult for me to debug their system remotely. If there is a significant problem then I am more than willing to receive a shipped unit to debug in the lab.

-Francis Houde

 

 

Houde-san,

Thank you for your reply.

Firstly, I clarify the purpose of this post.
This system communication is properly.
However my customer would like to know the cause of this SDIN distortion.

1. I confirm information of harness.
If capacitance of harness is large, is the SDIN distorted as above?
2. The part number of the TVS is "HZM6.2Z4MFA".
pdf.datasheetcatalog.com/.../02ctezwla0p2hrigcxwf16fe0zky.pdf
The leak current is uA order. Does this affect the TCA4311?
3. I confirm if there is buffers.
4. The cause of different rise time is different pull up resistor.
I confirm the condition of this connecting situation.
5. They hope to clarify this cause of distortion.
6. This application is printer.
My customer is considering to expand using the TCA4311A.

Best Regards,
Kuramochi

Kuramochi-san,

1) Do we have any capacitance values for the harness????

 

2) It looks like the zener diodes are low capacitance and the standoff voltage is high enough that there is no meaningful current conducting in the zener at the voltages seen in the application.   That's good.

 

3) Is this a statement? Are there other buffer's other than TCA4311A? Yes or No? If Yes, what is their part number and how is it connected to the TCA4311?

 

4) Have they verified that the different rise times still meet the I2C standards for rise time?

 

5)The distortion is due to the very large ( I am guessing) capacitance on the SDA/SCL lines due to harness and how it interacts with our device, TCA4311A. The TCA4311A has Rise Time Accelerators (RTAs) which turn on as the bus is released and the pull-up resistor starts to raise the voltage at that node. As the voltage rises above 0.6V a 2mA constant current source is switched in between the node and Vcc, which means it is in parallel with pull-up resistors. Note that there could be inductance between the TCA4311A's RTA and the pullup on the node which could be on either side of the harness. That could account for the distortion too. The RTA is only on for a short period of time and once it is turned off the node continues to rise towards the voltage rail, Vcc. The hope is that the RTA is on long enough to raise the voltage node to Vcc, but if the node has too much capacitance than the RTA turns OFF before it has reached Vcc and only the pull-up resistor has the job of raising the node to Vcc. Thus we see the different stages of when the node is release from 0V to rise to Vcc. I would like to have a system level diagram that includes master device, pull-up resistor locations and values, harness size and parasitic information, TCA4311A location, and information about everything is connected together in a real life.

 

I explained how the RTA work but my guess is that the parasitic connections and properties affect the signal and how it looks.  Can you tell me where you are taking the waveforms too.  That might also explain why it looks the way it does.

-Francis Houde

Houde-san,

Sorry for my late reply.

The customer implemented the TCA4311 on the the board as follows.

Though the harness was removed during FPGA and the TCA4311, distortion occurs as same as before.

Please let me know if I misunderstood.

Can't this distortion avoid?

Best Regards,

Kuramochi