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Fan out Buffer Is required for SPI Interface used in Industrial PCB?

Sharvy Mayan
Intellectual 680 points
Other Parts Discussed in Thread: SN74LVC3G34, SN74LVC245A

Hi,

We are planning connect a single SPI channel ( MISO,MOSI,CS,SCLK)  from our MCU to  8 different devices in the board. Please let me know,

FYI: SPI is connected 8 numbers of Digital Isolators kind devices. & the total routing length would be lesser than 15inch.

1) Do I need any kind of buffering before I branch the signals?

2) If so please suggest me the Fan Out buffer suitable for the SPI interface.

3) From some app notes, I can seen that we have to use tri-state buffers to  taken care the MISO lines  tri-state characteristics. Is that really matter, since I am connecting my SPI channel to 8 Digital Isolators?

Request you to give your advice asap, since I don't have a definite answer till the moment.

Best Regards

Sharvy

  • 0
    TI__Guru 56110 points

    Hi Sharvy ,

    Please list the spec requirements for your applications . For a start you can also look at the buffer parametric search on ti.com  here and go from there

  • 0 in reply to ShreyasRao
    Intellectual 680 points

    Dear Shreyas,

    Below block diagram shows our requirement. In order to reduce the loading of the SPI lines from the micro controller, we are planning to use a Fan out buffer to

    branch the single channel of SPI to 8 different Isolator SPI input. Do you have any other idea or do you recommend the below circuit? . Please suggest us a Fan out

    buffer the drive the 8 loads as depicted in the figure below.

    FYI: SPI is connected 8 numbers of Digital Isolators kind devices. & the total routing length would be lesser than 15inch.

    Best Regards

    Sharvy

  • 0 in reply to Sharvy Mayan
    TI__Guru 56110 points
    Hi Sharvy ,

    SN74LVC3G34 is triple buffer gate which can be considered in your case . This has higher drive strength of 32mA .
    This works at 1.65 to 5.5V logic . what voltage is the ADC and MCU working at ? what is the purpose of the isolator ?
  • 0 in reply to ShreyasRao
    Intellectual 680 points

    Dear Shreyas,

    Thanks for the reply.

    Working voltage of the buffer input and output will be at 3.3V. In order to meet our requirement, we have used  separate Isolator on each

    channel  to get ADC channel to channel isolation of 1.5kV.

    1. Could you please tell me the maximum data rate supported by this buffer? 
    2. For SPI signal, I have 2 Outputs and 1 input ( Direction from Host MCU ). This buffer seems to be all are in one direction. Please suggest .
    3. Can I use it for the buffering of  SPI interface?

    Best Regards

    Sharvy

  • 0 in reply to Sharvy Mayan
    TI__Guru 56110 points
    Hi Sharvy ,

    Max supported frequency is 150Mhz and this is unidirectional buffer , meaning bidirectional signals cant be used on this . A transceiver like sn74LVC245A needs to be used for bidirectional buffer capability , however , needs Direction(DIR) pin for it .
    I see from your block diagram that the signals are unidirectional with single MISO going in opposite direction which shouldn't be a problem with LVC3G34 . That can be taken care in the routing stage .
  • 0 in reply to ShreyasRao
    Intellectual 680 points

    Dear Shreyas,

    Thanks for the help.

    We will include this in our design proposal.

    Best Regards

    Sharvy