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Thank you for answer.
I understand it well.
But there is one more question.The Pin fuction diagram for the YZP Package is shown on page 3 of the Datasheet.
The image on the Datasheet is written as Bottom view but when you look at the arrangement of the Pin,
it is not Bottom View and it looks like Top View.
Is this wrong?
I have drawn the top and bottom view pin arrays based on what you have answered below.
If this is correct, the image of the YZP Package on Datasheet 3 page appears as Top view.
If the picture in the datasheet is wrong, it could be confusing to anyone, and I think it is necessary to modify the datasheet.
Pleas Check it.
Thank you
Best Regards
From Yoo
Hi Anthony,
Based on page 32 and page 33 of the datasheet, the footprint in the CAD file seems wrong. Can you please let me know where you downloaded the CAD file - was it from the product folder on ti.com ?
Regards,
Gerold
Hello
Thank you for your reply.
It is down from the Product Folder on the TI homepage.
There is a link below.
Please check.
Thank you
Best regards
Thanks for your reply.
I checked the cad symbol you linked to.
But the symbol you link to does not seem to be perfect either.
The left logic symbol and the right pin map do not match.
The left logic symblo has only 3 pins, but the actual IC is 5 pins.
Anyway, I used yesterday's IC sample to test the wire by soldering it.
I have tested and confirmed that the CAD symbol is incorrect and that the datasheet is correct.
If I match function and vol-pin map as a result of the review, it is as follows.
Thank you
Best Regards
From Anthony
Hi Anthony,
As this is a logic IC, the VCC and GND pins are separated into a dual part configuration. Part_A has A,B,Y and Part_B has VCC and GND.
So, when you place the symbol on your schematic, you might be allowed to do it twice to place both parts. But the footprint will still be a single footprint.
Regards,
Gerold