ADC Reading problem with TMS320F28335 eZDSP development board..

hakan demir

Other Parts Discussed in Thread: TMS320F28335, CONTROLSUITE

Hello everybody,

I am working with TMS320F28335 eZDSP from Spectrum Digital.

I have a problem about reading values from ADCIN pins from the development board.I use ADCINA0,ADCINA1,ADCIN2,ADCIN3,ADCIN4,ADCIN5,ADCIN6 pins.

I read all the channels as 0 with this code..

Here is the code ;

void main(void)

{

// Step 1. Initialize System Control:

// PLL, WatchDog, enable Peripheral Clocks

// This example function is found in the DSP2833x_SysCtrl.c file.

InitSysCtrl();

EALLOW;

#if (CPU_FRQ_150MHZ) // Default - 150 MHz SYSCLKOUT

#define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz

#endif

#if (CPU_FRQ_100MHZ)

#define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*3) = 12.5 MHz

#endif

EDIS;

// Step 2. Initialize GPIO:

// This example function is found in the DSP2833x_Gpio.c file and

// illustrates how to set the GPIO to it's default state.

EALLOW;

SysCtrlRegs.HISPCP.all = ADC_MODCLK;

EDIS;

InitAdc();

// Configure ADC

AdcRegs.ADCTRL3.bit.SMODE_SEL = 0x1; // Setup simultaneous sampling mode

AdcRegs.ADCMAXCONV.all = 0x0005;

AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup conv from ADCINA0 &

AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1; // Setup conv from ADCINA1 &

AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2; // Setup conv from ADCINA2 &

AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3; // Setup conv from ADCINA3 &

AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x4; // Setup conv from ADCINA4 &

AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x5; // Setup conv from ADCINA5 &

AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x6; // Setup conv from ADCINA6 &

for(;;)

{

AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 0X1; // Start of conversion trigger for SEQ1

DELAY_US(1);

adcin0= AdcRegs.ADCRESULT0 ;

adcin1= AdcRegs.ADCRESULT1 ;

adcin2= AdcRegs.ADCRESULT2 ;

adcin3=AdcRegs.ADCRESULT3;

adcin4=AdcRegs.ADCRESULT4;

adcin5=AdcRegs.ADCRESULT5;

adcin6=AdcRegs.ADCRESULT6;

}

ADC.cal.asm

.def _ADC_cal

.asg "0x711C", ADCREFSEL_LOC

;-----------------------------------------------

; _ADC_cal

;-----------------------------------------------

; This is the ADC cal routine.This routine is programmed into

; reserved memory by the factory. 0xAAAA and 0xBBBB are place-

; holders for calibration data.

;The actual values programmed by TI are device specific.

;

; This function assumes that the clocks have been

; enabled to the ADC module.

;-----------------------------------------------

.sect ".adc_cal"

_ADC_cal

MOVW DP, #ADCREFSEL_LOC >> 6

MOV @28, #0xAAAA ; actual value may not be 0xAAAA

MOV @29, #0xBBBB ; actual value may not be 0xBBBB

LRETR

ADC.C

#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File

#include "DSP2833x_Examples.h" // DSP2833x Examples Include File

#define ADC_usDELAY 5000L

//---------------------------------------------------------------------------

// InitAdc:

//---------------------------------------------------------------------------

// This function initializes ADC to a known state.

void InitAdc(void)

{

extern void DSP28x_usDelay(Uint32 Count);

// *IMPORTANT*

// The ADC_cal function, which copies the ADC calibration values from TI reserved

// OTP into the ADCREFSEL and ADCOFFTRIM registers, occurs automatically in the

// Boot ROM. If the boot ROM code is bypassed during the debug process, the

// following function MUST be called for the ADC to function according

// to specification. The clocks to the ADC MUST be enabled before calling this

// function.

// See the device data manual and/or the ADC Reference

// Manual for more information.

EALLOW;

SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1;

ADC_cal();

EDIS;

// To powerup the ADC the ADCENCLK bit should be set first to enable

// clocks, followed by powering up the bandgap, reference circuitry, and ADC core.

// Before the first conversion is performed a 5ms delay must be observed

// after power up to give all analog circuits time to power up and settle

// Please note that for the delay function below to operate correctly the

// CPU_RATE define statement in the DSP2833x_Examples.h file must

// contain the correct CPU clock period in nanoseconds.

AdcRegs.ADCTRL3.all = 0x00E0; // Power up bandgap/reference/ADC circuits

DELAY_US(ADC_usDELAY); // Delay before converting ADC channels

// FILE: DSP2833x_Adc.h

// TITLE: DSP2833x Device ADC Register Definitions.

//###########################################################################

// $TI Release: F2833x/F2823x Header Files and Peripheral Examples V141 $

// $Release Date: November 6, 2015 $

//###########################################################################

#ifndef DSP2833x_ADC_H

#define DSP2833x_ADC_H

#ifdef __cplusplus

extern "C" {

#endif

//---------------------------------------------------------------------------

// ADC Individual Register Bit Definitions:

struct ADCTRL1_BITS { // bits description

Uint16 rsvd1:4; // 3:0 reserved

Uint16 SEQ_CASC:1; // 4 Cascaded sequencer mode

Uint16 SEQ_OVRD:1; // 5 Sequencer override

Uint16 CONT_RUN:1; // 6 Continuous run

Uint16 CPS:1; // 7 ADC core clock pre-scalar

Uint16 ACQ_PS:4; // 11:8 Acquisition window size

Uint16 SUSMOD:2; // 13:12 Emulation suspend mode

Uint16 RESET:1; // 14 ADC reset

Uint16 rsvd2:1; // 15 reserved

};

union ADCTRL1_REG {

Uint16 all;

struct ADCTRL1_BITS bit;

};

struct ADCTRL2_BITS { // bits description

Uint16 EPWM_SOCB_SEQ2:1; // 0 EPWM compare B SOC mask for SEQ2

Uint16 rsvd1:1; // 1 reserved

Uint16 INT_MOD_SEQ2:1; // 2 SEQ2 Interrupt mode

Uint16 INT_ENA_SEQ2:1; // 3 SEQ2 Interrupt enable

Uint16 rsvd2:1; // 4 reserved

Uint16 SOC_SEQ2:1; // 5 Start of conversion for SEQ2

Uint16 RST_SEQ2:1; // 6 Reset SEQ2

Uint16 EXT_SOC_SEQ1:1; // 7 External start of conversion for SEQ1

Uint16 EPWM_SOCA_SEQ1:1; // 8 EPWM compare B SOC mask for SEQ1

Uint16 rsvd3:1; // 9 reserved

Uint16 INT_MOD_SEQ1:1; // 10 SEQ1 Interrupt mode

Uint16 INT_ENA_SEQ1:1; // 11 SEQ1 Interrupt enable

Uint16 rsvd4:1; // 12 reserved

Uint16 SOC_SEQ1:1; // 13 Start of conversion trigger for SEQ1

Uint16 RST_SEQ1:1; // 14 Restart sequencer 1

Uint16 EPWM_SOCB_SEQ:1; // 15 EPWM compare B SOC enable

};

union ADCTRL2_REG {

Uint16 all;

struct ADCTRL2_BITS bit;

};

struct ADCASEQSR_BITS { // bits description

Uint16 SEQ1_STATE:4; // 3:0 SEQ1 state

Uint16 SEQ2_STATE:3; // 6:4 SEQ2 state

Uint16 rsvd1:1; // 7 reserved

Uint16 SEQ_CNTR:4; // 11:8 Sequencing counter status

Uint16 rsvd2:4; // 15:12 reserved

};

union ADCASEQSR_REG {

Uint16 all;

struct ADCASEQSR_BITS bit;

};

struct ADCMAXCONV_BITS { // bits description

Uint16 MAX_CONV1:4; // 3:0 Max number of conversions

Uint16 MAX_CONV2:3; // 6:4 Max number of conversions

Uint16 rsvd1:9; // 15:7 reserved

};

union ADCMAXCONV_REG {

Uint16 all;

struct ADCMAXCONV_BITS bit;

};

struct ADCCHSELSEQ1_BITS { // bits description

Uint16 CONV00:4; // 3:0 Conversion selection 00

Uint16 CONV01:4; // 7:4 Conversion selection 01

Uint16 CONV02:4; // 11:8 Conversion selection 02

Uint16 CONV03:4; // 15:12 Conversion selection 03

};

union ADCCHSELSEQ1_REG{

Uint16 all;

struct ADCCHSELSEQ1_BITS bit;

};

struct ADCCHSELSEQ2_BITS { // bits description

Uint16 CONV04:4; // 3:0 Conversion selection 04

Uint16 CONV05:4; // 7:4 Conversion selection 05

Uint16 CONV06:4; // 11:8 Conversion selection 06

Uint16 CONV07:4; // 15:12 Conversion selection 07

};

union ADCCHSELSEQ2_REG{

Uint16 all;

struct ADCCHSELSEQ2_BITS bit;

};

struct ADCCHSELSEQ3_BITS { // bits description

Uint16 CONV08:4; // 3:0 Conversion selection 08

Uint16 CONV09:4; // 7:4 Conversion selection 09

Uint16 CONV10:4; // 11:8 Conversion selection 10

Uint16 CONV11:4; // 15:12 Conversion selection 11

};

union ADCCHSELSEQ3_REG{

Uint16 all;

struct ADCCHSELSEQ3_BITS bit;

};

struct ADCCHSELSEQ4_BITS { // bits description

Uint16 CONV12:4; // 3:0 Conversion selection 12

Uint16 CONV13:4; // 7:4 Conversion selection 13

Uint16 CONV14:4; // 11:8 Conversion selection 14

Uint16 CONV15:4; // 15:12 Conversion selection 15

};

union ADCCHSELSEQ4_REG {

Uint16 all;

struct ADCCHSELSEQ4_BITS bit;

};

struct ADCTRL3_BITS { // bits description

Uint16 SMODE_SEL:1; // 0 Sampling mode select

Uint16 ADCCLKPS:4; // 4:1 ADC core clock divider

Uint16 ADCPWDN:1; // 5 ADC powerdown

Uint16 ADCBGRFDN:2; // 7:6 ADC bandgap/ref power down

Uint16 rsvd1:8; // 15:8 reserved

};

union ADCTRL3_REG {

Uint16 all;

struct ADCTRL3_BITS bit;

};

struct ADCST_BITS { // bits description

Uint16 INT_SEQ1:1; // 0 SEQ1 Interrupt flag

Uint16 INT_SEQ2:1; // 1 SEQ2 Interrupt flag

Uint16 SEQ1_BSY:1; // 2 SEQ1 busy status

Uint16 SEQ2_BSY:1; // 3 SEQ2 busy status

Uint16 INT_SEQ1_CLR:1; // 4 SEQ1 Interrupt clear

Uint16 INT_SEQ2_CLR:1; // 5 SEQ2 Interrupt clear

Uint16 EOS_BUF1:1; // 6 End of sequence buffer1

Uint16 EOS_BUF2:1; // 7 End of sequence buffer2

Uint16 rsvd1:8; // 15:8 reserved

};

union ADCST_REG {

Uint16 all;

struct ADCST_BITS bit;

};

struct ADCREFSEL_BITS { // bits description

Uint16 rsvd1:14; // 13:0 reserved

Uint16 REF_SEL:2; // 15:14 Reference select

};

union ADCREFSEL_REG {

Uint16 all;

struct ADCREFSEL_BITS bit;

};

struct ADCOFFTRIM_BITS{ // bits description

int16 OFFSET_TRIM:9; // 8:0 Offset Trim

Uint16 rsvd1:7; // 15:9 reserved

};

union ADCOFFTRIM_REG{

Uint16 all;

struct ADCOFFTRIM_BITS bit;

};

struct ADC_REGS {

union ADCTRL1_REG ADCTRL1; // ADC Control 1

union ADCTRL2_REG ADCTRL2; // ADC Control 2

union ADCMAXCONV_REG ADCMAXCONV; // Max conversions

union ADCCHSELSEQ1_REG ADCCHSELSEQ1; // Channel select sequencing control 1

union ADCCHSELSEQ2_REG ADCCHSELSEQ2; // Channel select sequencing control 2

union ADCCHSELSEQ3_REG ADCCHSELSEQ3; // Channel select sequencing control 3

union ADCCHSELSEQ4_REG ADCCHSELSEQ4; // Channel select sequencing control 4

union ADCASEQSR_REG ADCASEQSR; // Autosequence status register

Uint16 ADCRESULT0; // Conversion Result Buffer 0

Uint16 ADCRESULT1; // Conversion Result Buffer 1

Uint16 ADCRESULT2; // Conversion Result Buffer 2

Uint16 ADCRESULT3; // Conversion Result Buffer 3

Uint16 ADCRESULT4; // Conversion Result Buffer 4

Uint16 ADCRESULT5; // Conversion Result Buffer 5

Uint16 ADCRESULT6; // Conversion Result Buffer 6

Uint16 ADCRESULT7; // Conversion Result Buffer 7

Uint16 ADCRESULT8; // Conversion Result Buffer 8

Uint16 ADCRESULT9; // Conversion Result Buffer 9

Uint16 ADCRESULT10; // Conversion Result Buffer 10

Uint16 ADCRESULT11; // Conversion Result Buffer 11

Uint16 ADCRESULT12; // Conversion Result Buffer 12

Uint16 ADCRESULT13; // Conversion Result Buffer 13

Uint16 ADCRESULT14; // Conversion Result Buffer 14

Uint16 ADCRESULT15; // Conversion Result Buffer 15

union ADCTRL3_REG ADCTRL3; // ADC Control 3

union ADCST_REG ADCST; // ADC Status Register

Uint16 rsvd1;

Uint16 rsvd2;

union ADCREFSEL_REG ADCREFSEL; // Reference Select Register

union ADCOFFTRIM_REG ADCOFFTRIM; // Offset Trim Register

};

struct ADC_RESULT_MIRROR_REGS

{

Uint16 ADCRESULT0; // Conversion Result Buffer 0

Uint16 ADCRESULT1; // Conversion Result Buffer 1

Uint16 ADCRESULT2; // Conversion Result Buffer 2

Uint16 ADCRESULT3; // Conversion Result Buffer 3

Uint16 ADCRESULT4; // Conversion Result Buffer 4

Uint16 ADCRESULT5; // Conversion Result Buffer 5

Uint16 ADCRESULT6; // Conversion Result Buffer 6

Uint16 ADCRESULT7; // Conversion Result Buffer 7

Uint16 ADCRESULT8; // Conversion Result Buffer 8

Uint16 ADCRESULT9; // Conversion Result Buffer 9

Uint16 ADCRESULT10; // Conversion Result Buffer 10

Uint16 ADCRESULT11; // Conversion Result Buffer 11

Uint16 ADCRESULT12; // Conversion Result Buffer 12

Uint16 ADCRESULT13; // Conversion Result Buffer 13

Uint16 ADCRESULT14; // Conversion Result Buffer 14

Uint16 ADCRESULT15; // Conversion Result Buffer 15

};

//---------------------------------------------------------------------------

// ADC External References & Function Declarations:

extern volatile struct ADC_REGS AdcRegs;

extern volatile struct ADC_RESULT_MIRROR_REGS AdcMirror;

#ifdef __cplusplus

}

#endif /* extern "C" */

#endif // end of DSP2833x_ADC_H definition

over 7 years ago

0 Kyle Cousino over 7 years ago

TI__Mastermind 24955 points

Hakan,

It may be helpful to download controlSUITE and take a look at the example code that is provided for the F2833x devices. However, quickly looking at your code, it looks like you are using a software trigger to start the ADC conversion process. However, it does not appear that you wait for the interrupt bit to clear to signal the end of the conversion process. After this interrupt, you can then save the ADC results into a variable or buffer. So I would look into making sure you add the extra logic needed to wait for the conversion process to finish before trying to save off the results. Otherwise, you will just get all zeroes. Again, I would definitely recommend downloading controlSUITE and taking a look at the examples that are provided to you. Please let us know if you have any questions.

Kyle

0 hakan demir over 7 years ago in reply to Kyle Cousino

Prodigy 30 points

Thanks for your help Kyle,

I downloaded and look at the adc examples(Soc,sequencer mode etc). Now I have a different problem; i see the values ,as it must be, between 0-4095 with the examples but my code reads between 0-65535.I used header and adc.c adc_cal.asm files from the adcSoc example.Why could it be happen ?

0 Kyle Cousino over 7 years ago in reply to hakan demir

TI__Mastermind 24955 points

Hakan,

I'm glad that you were able to download controlSUITE and take a look at the examples provided. Now, I may need some more information from you, like code segments, to better understand your question. However, I think I have an idea about the question you are asking. Some of the C2000 ADCs have both 12-bit and 16-bit capabilities. For the 12-bit ADCs, the range of possible result values spans 0-4095 for a total of 4096 values. For the 16-bit ADCs, the range of possible result values spans 0-65535 for a total of 65536 values. So my follow-up question for you would be the following:

Were you expecting values between 0 and 4095, but instead you are seeing values between 0 and 65535?

If this is the case, this would point to how you are setting up your ADC during software initialization. In our controlSUITE examples, we use the ADCSetMode() function to specify whether the ADC is operating in 12-bit mode or 16-bit mode. This would be a quick fix to adjust the mode your ADC is operating at. Both controlSUITE and CCS have macros that allow you to use ADC_RESOLUTION_12BIT and ADC_RESOLUTION_16BIT to easily switch between the two operating modes.

Please let me know if you have any follow-up questions or if any of the information here needs additional clarification.

Kyle

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ADC Reading problem with TMS320F28335 eZDSP development board..