Tool/software: Code Composer Studio
I am using 28069 controlSTICK to implement a simple oscilloscope with 2 ADC channel both at 1MHz sampling rate.
ADCCLK is 45MHz
ADCINA2 and ADCINB2 sample sequentially in continuous mode, SOC0/1 triggered by ADCINT1, EOC0 triggers ADCINT1,EOC1 triggers ADCINT2
so I think the following setup should give 1MHz for each channel: 45MHz/(6+16)/2 = 1.022MHz
EALLOW; AdcRegs.ADCCTL2.bit.CLKDIV2EN = 1; AdcRegs.ADCCTL2.bit.CLKDIV4EN = 0; //ADCCLK=SYSCLK/2 DELAY_US(ADC_usDELAY); // Delay before converting ADC channels AdcRegs.ADCCTL1.bit.INTPULSEPOS = 1; // late interrupt pulse AdcRegs.INTSEL1N2.bit.INT1E = 1; // Enabled ADCINT1 AdcRegs.INTSEL1N2.bit.INT1CONT = 1; // Enable ADCINT1 Continuous mode AdcRegs.INTSEL1N2.bit.INT2E = 1; // Enabled ADCINT2 AdcRegs.INTSEL1N2.bit.INT2CONT = 1; // Enable ADCINT2 Continuous mode AdcRegs.INTSEL1N2.bit.INT1SEL = 0; // setup EOC0 to trigger ADCINT1 to fire AdcRegs.INTSEL1N2.bit.INT2SEL = 1; // setup EOC1 to trigger ADCINT2 to fire AdcRegs.ADCSOC0CTL.bit.CHSEL = 2; // set SOC0 channel select to ADCINA2 AdcRegs.ADCSOC1CTL.bit.CHSEL = 10; // set SOC1 channel select to ADCINB2 AdcRegs.ADCINTSOCSEL1.bit.SOC0 = 1; // ADCINT1 will trigger SOC0 AdcRegs.ADCINTSOCSEL1.bit.SOC1 = 1; // ADCINT1 will trigger SOC1 AdcRegs.ADCSOC0CTL.bit.ACQPS = 15; // set SOC0 S/H Window to 16 ADC Clock Cycles, (15 ACQPS plus 1) AdcRegs.ADCSOC1CTL.bit.ACQPS = 15; // set SOC1 S/H Window to 16 ADC Clock Cycles, (15 ACQPS plus 1) EDIS;
So if I display 100 points when measuring a 10KHz sine signal, it should give a full period of sine wave. But I am getting 5 here, which means the sampling rate is about 200KHz.
Can somebody point out any issue in my code or anything I missed?