Peripheral Reset:
The peripheral modules are accessed via a "Peripheral Central Resource" (PCR) controller module that keeps all peripherals under reset by default (after start up or any system reset condition). The peripheral reset is released by writing '1' to the PENA (Peripheral Enable) bit of the CLKCNTL (Peripheral Clock control) register of the system module at address 0xFFFFFFD0, shown below.
Enabling clocks to peripherals:
The peripheral modules' register frames are assigned to one or more quadrants of a memory region divided into 32 peripheral selects, each of 1KB. Some peripherals only require one quadrant (256 bytes) and some require more. The PCR module turns off the clocks to the peripheral modules after a system reset condition. The application must enable clocks to each peripheral module before the module can do its specified function. This is easily done by setting the required bits in the PSPWRDNCLRx registers of the PCR module. These registers are at addresses 0xFFFFE0A0, 0xFFFFE0A4, 0xFFFFE0A8 and 0xFFFFE0AC, and are shown below. Please refer to the Datasheet and the Technical Reference Manual for the TMS570LS series microcontroller for further details on the memory map and the peripheral selects for each peripheral module.
