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Floating point exception handling

Ryan Smoots
Intellectual 260 points
Other Parts Discussed in Thread: RM48L952


Configuration

I am using the RM48L952 and debugging with a Lauterbach Trace32 JTAG interface.

The floating-point unit is enabled by setting FPUSCR[30].

The floating-point exception signals are set to propagate by setting Secondary Auxiliary Control Register bits 13-8.

These exception settings correspond to the exception flags FPUEXC[7, 4-0].

VIM channel 47 (FPU) is enabled and set to FIQ.

Testing

Immediately upon enabling the FIQ an FIQ is fired. Reading the FIQINDEX returns 0 which indicates that no interrupts are pending. The FIQ handler returns.

Continuing execution a second FIQ occurs immediately. This time reading FIQINDEX returns 48 indicating an FPU interrupt. I would expect to see at least one of the cumulative exception flags set in FPEXC. However, all flags are cleared.

Analysis

My understanding is that all 6 of the flags from FPEXC are ORd to produce the VIM channel 47 state. Why am I seeing this unexpected behavior?

Thanks in advance,

Ryan

  • 0
    TI__Guru 59540 points
    Hello Ryan,

    I am forwarding your question to one our RM48 experts. They should get back with you shortly.
  • 0
    TI__Mastermind 49120 points
    Hi Ryan,

    All 6 flags indicating separate FPU exceptions are indeed OR'ed and connected to VIM channel 47. Can you send me your test routine that shows this behavior? There is some confusion with register names in your post:

    - FPU is enabled via bit 30 in FPEXC (FP Exception Register) plus the system control coprocessor
    - The FP exception outputs need to be enabled via the Secondary Aux. Control register bits 13 - 8
    - The exception flags are read in the FPSCR (FP Status and Control Register) bits 7, 4 - 0.

    Regards,
    Sunil
  • 0 in reply to Sunil Oak
    Intellectual 260 points
    Thanks for your prompt reply Sunil.

    You are right, I had a typo in my post. The FPU is enabled with FPEXC[30] and coprocessors 10 and 11 are configured to allow privileged and user mode access using the following auto-generated routine:

    _coreEnableVfp_

    mrc p15, #0x00, r0, c1, c0, #0x02
    orr r0, r0, #0xF00000
    mcr p15, #0x00, r0, c1, c0, #0x02
    mov r0, #0x40000000
    fmxr fpexc, r0
    bx lr


    In writing this reply, I realized that I had failed to call this routine. Now that it is executed, the FIQ is only fired when any of the exception flags with enabled outputs (in the Secondary Aux. Ctrl register) are set.

    Thank you!

    Ryan