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RM48L930: enabling FPU on Hercules RM48Lx30

Keith
Intellectual 800 points

Part Number: RM48L930

Hello,

My project requires floating point support, and the uC I am using (RM48L930) contains a FPU coprocessor.  In the HALCoGen 'Cortex R4 - General Configuration' area  I enabled "Enable Vectored Floating Point Unit".  However, I don't see a call to _coreEnableVfp_() in sys_startup.c.  Is this a known issue in HALCOGen 4.07.00?  Do I need to add a call to _coreEnableVfp_() to enable the FPU coprocessor?  My project compiler processor options are set to -mv7R4 --float_support=VFPv3D16.

Thank you,

Keith

  • 0
    TI__Guru 59540 points

    Hello Keith,

    I understand the confusion with this. The FPU is enabled within the _coreInitRegisters_ function in sys_core.asm file. The point of confusion is the enabling code is inline and the assembly function _coreEnableVfp_ is not called by the initialization code. The _coreInitRegisters_  function is provided for ease of enabling the floating point unit from within another C file in case it needs to be disabled and re-enabled for some reason. See the _coreInitRegisters_ listing below with the FPU enable portion highlighted.

    ;-------------------------------------------------------------------------------
; Initialize CPU Registers
; SourceId : CORE_SourceId_001
; DesignId : CORE_DesignId_001
; Requirements: HL_SR477, HL_SR476, HL_SR492

    .def     _coreInitRegisters_
    .asmfunc


_coreInitRegisters_


    ; After reset, the CPU is in the Supervisor mode (M = 10011)
        mov r0, lr
        mov r1, #0x0000
        mov r2, #0x0000
        mov r3, #0x0000
        mov r4, #0x0000
        mov r5, #0x0000
        mov r6, #0x0000
        mov r7, #0x0000
        mov r8, #0x0000
        mov r9, #0x0000
        mov r10, #0x0000
        mov r11, #0x0000
        mov r12, #0x0000
        mov r13, #0x0000
        mrs r1, cpsr
        msr spsr_cxsf, r1
        ; Switch to FIQ mode (M = 10001)
        cps #17
        mov lr, r0
        mov r8, #0x0000
        mov r9, #0x0000
        mov r10, #0x0000
        mov r11, #0x0000
        mov r12, #0x0000
        mrs r1, cpsr
        msr spsr_cxsf, r1
        ; Switch to IRQ mode (M = 10010)
        cps #18
        mov lr, r0
        mrs r1,cpsr
        msr spsr_cxsf, r1
        ; Switch to Abort mode (M = 10111)
        cps #23
        mov lr, r0
        mrs r1,cpsr
        msr spsr_cxsf, r1
        ; Switch to Undefined Instruction Mode (M = 11011)
        cps #27
        mov lr, r0
        mrs r1,cpsr
        msr spsr_cxsf, r1
        ; Switch to System Mode ( Shares User Mode registers ) (M = 11111)
        cps #31
        mov lr, r0
        mrs r1,cpsr
        msr spsr_cxsf, r1


        mrc   p15,     #0x00,      r2,       c1, c0, #0x02
        orr   r2,      r2,         #0xF00000
        mcr   p15,     #0x00,      r2,       c1, c0, #0x02
        mov   r2,      #0x40000000
        fmxr  fpexc,   r2

        fmdrr d0,         r1,     r1
        fmdrr d1,         r1,     r1
        fmdrr d2,         r1,     r1
        fmdrr d3,         r1,     r1
        fmdrr d4,         r1,     r1
        fmdrr d5,         r1,     r1
        fmdrr d6,         r1,     r1
        fmdrr d7,         r1,     r1
        fmdrr d8,         r1,     r1
        fmdrr d9,         r1,     r1
        fmdrr d10,        r1,     r1
        fmdrr d11,        r1,     r1
        fmdrr d12,        r1,     r1
        fmdrr d13,        r1,     r1
        fmdrr d14,        r1,     r1
        fmdrr d15,        r1,     r1
        bl    next1
next1
        bl    next2
next2
        bl    next3
next3
        bl    next4
next4
        bx    r0

    .endasmfunc

  • 0 in reply to Chuck Davenport
    Intellectual 800 points

    Thanks Chuck, I missed that the first time when reviewing _coreInitRegisters_.  Makes sense now.  A follow-on question: I added some test code to call a trig function (atan()) then looked at the .lst file to see what asm code was generated.  Instead of using the ATAN directly the compiler made a call to atan() in the rtsv7R4_T_le_v3D16_eabi.lib.  Any idea why it wouldn't use ATAN directly?

    Thanks,

    Keith