MSP430F67451 32x61 multiplier

Richard Lavine said:

In the parametric list this processor shows a 32x61 hardware multiplier but when I check the data sheets and family guide

 Hi, from product page I don't see that, please can point us to see where you find that?

http://www.ti.com/product/msp430f67451

 Part has a 32x32bit MAC so result are on 64Bit or operand range if smaller operand are selected.

Look under the multipliers heading at 

http://www.ti.com/lsds/ti/microcontrollers_16-bit_32-bit/msp/low_power_performance/msp430f5x_msp430f6x/products.page

This shows 32x32 with various increments of the 2nd number.

So is this an error in this chart, or is there an actual variant involved?

Richard Lavine said:

This shows 32x32 with various increments of the 2nd number.

 Hi Richard, I suppose this can be an error, I submitted an error report, we can see what happen.

Thanks for submitting the potential error.

If they respond on on this tread in E2E, please let me know.

It looks like when adding the new devices into the database, the auto-fill function was used, but with auto-increment enabled (MySQL has such a feature, which is usually useful, especially when it is an index row) or excel was used to enter the new data, and here the row-fill was used with auto-increment.

Thanks Michael

Since you seem to have a connection to TI, please make them drive a stake into the heart of the timer A, and move on to timer C, get us some open drain outputs, a DMA that does not shut off the processor, all while making the thing run on negative current so it can be used as an inexhaustible battery.

You know that there’s already TimerD?
But there’s a reason for the old TImerA: it is small. Small size on die and small energy consumption. TimerB has more functionality but needs more die space and more energy to operate. And the fast TimerD is even worse.

Open-drain-outputs are no problem too. Just keep PxOUT low and control the output with PxDIR. You can even decide whether to have OC with pull-up or without.

DMA can’t work simultaneously to the processor. It would require a secondary address as well as dual-port  ram, flash and hardware registers. At each MCLK cycle, only one can access the existing data and address bus. And only read or write.
I know that some people think they can eat and speak at the same time because they don’t need their brain for eating and their stomach for speaking. However, you know how disgusting this can become.

Yeah, OK, you defend the MSP well, but lets face it, it's a relic, the last  surviving, Von Neumann PDP 11 on a chip.

But they keep enticing me with goofy things like good, cheap, separate signal delta converters with PGA front ends, on a $2 processor. 

I really prefer Von Neumann over Harvard. I work with both. I even implemented the same code on both. Well, both have their pros and cons, but most 'advantages' of Harvard can be compensated for or are meaningless for MCUs, while the disadvantages are an obstacle for efficient MCU programming. For workstations, this is of course different.