• State
  • Locked Locked
  • Replies 6 replies
  • Subscribers 79 subscribers
  • Views 824 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSP430 I2C Master mode is cleared unexpectedly

bing39062
Prodigy 200 points

Hi, our device uses MSP430F247T to communicate with bq20z95 over I2C1.  The MSP430 acts as the master. It works well in normal conditions. But sometimes we noticed that the UCMST bit got reset to 0 and I2C1 became slave, according to the datasheet:

"When a master loses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave."

If I understand it correctly, it should never happen to us because we do not enable Multi-master mode (UCMM = 0).

We checked the errata, but did not see it is a known issue.

Has anyone seen similar issues? What could cause this problem?

Thanks in advance.

Bin

 

  • 0
    Prodigy 110 points

    Are you sure it's hardware related?

  • 0 in reply to Daniel Browne
    Prodigy 200 points

    Pretty sure it is not the software, the code never reset the UCMST bit to 0. Although it tries to reset the port by setting UCSWRST = 1, according to the datasheet, that bit does not reset UCMST.

    Bin

  • 0
    Guru 227245 points

    Arbitration loss happens when the USCI outputs a ‘1’ but on the rising clock edge, SDA is ‘0’. If the external hardware is okay, this means that another master was sending a ‘0’ bit at the same time. If two masters are competing for the bus, the one wins who first sends a ‘0’ when the other sends a ‘1’ (up to this point, the two are sanding the same, which doesn’t do any harm, and the clock stretching feature synchronizes their clocks implicitly)

    So if you are the only master, then something is keeping SDA unexpectedly low. Missing pull-up (or bad soldering)? A crashed (or not yet ready powered-up) slave?

  • 0 in reply to Jens-Michael Gross
    Prodigy 200 points

    Thanks Jens, we understand sometimes noise on the data line could cause the Master to lose arbitration. We was questioning why UCMST was cleared automatically, since according to the datasheet:

    "When a master loses arbitration in a multi-master environment (UCMM = 1) the UCMST bit is automatically cleared and the module acts as slave."

    because we never set UCMM to '1', and it stays '0' all the time; our uderstanding is that it should NOT clear the UCMST bit when it loses arbitration, and UCMST once is set to '1' and should always be '1'. Is our understanding wrong?

  • 0 in reply to bing39062
    Guru 227245 points

    Description of UCMM reads that it is just disabling the address compare in master mode.
    My guess is that UCMM=1 is not required for arbitration loss detection and exiting master mode.
    All the diagrams show that on lost arbitration, UCMST is cleared, with UCMM not being listed as a prerequisite.

  • 0 in reply to Jens-Michael Gross
    Prodigy 200 points

    We also suspected that was what happened and wanted to confirm.  Your explanation makes a lot of sense, thanks again Jens! 

**Attention** This is a public forum