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Reception errors using UCA0 in UART mode.

Steven Burck
Prodigy 130 points
Other Parts Discussed in Thread: MSP430F5510

I've just taken a new board with an MSP430F5510 on it, and starting from sample code, started writing a driver for the UART.  It works in Tx, but in Rx I am always getting framing errors.  I am using REFO as ACLK, and as the baud-rate generator, but even when slowing down to 1200bps, it is not working.  At all rates (1200, 2400, 4800 and 9600), the Tx comes out fine, the Rx comes, 99.9% of the time with a framing error (UCA1STAT shows 0x24, meaning UCRXERR and UCOE), and when that fails to happen, and the UCA1STAT register does not register an error, (0.1% of the time), the incoming character is wrong; I have been sending 0x31, and it will be received as 0x32 in the few times I have managed to catch it.  I tried slowing the baud rate, moving the generator to SMCLK and sourcing it from a faster DCO (still based on the REFO, this board has no crystal), and no luck - always the same issue.

The sender is a PC using a USB to serial converter, I doubt that it is sending at non-standard rates, although I think my next step is to look at the incoming signal on a scope and try to figure this out, unless one of the experts here can tell me why this might be happening.  I haven't used the MSP for a long time, and a lot of the 5510 features are new to me, but this part seems more or less (except for the REFO) like I used to write using a 32K crystal.

  • 0
    Guru 227245 points
    There's a tolerance range for the bit timing. If you use REFO as clock base, you have a quite large timing error (32768/9600 = 3.41 which isn't an integer). Also, REFO isn't 100% precise. As a result you're quite off with the individual bits. Probably, your PC (or whatever) is tolerant enough to catch the incoming data, but the MSP can't. It is possible that you get better results when using REFO to stabilize the DCO to a higher frequency and use DCO->SMCLK for the USCI. The higher frequency and the larger divider allows a finer granularity in detecting the incoming data. it will also reduce the outgoing bit timing error. (take a look at the users guide - the resulting errors for different clock sources and baudrates are listed there)
  • 0 in reply to Jens-Michael Gross
    Prodigy 130 points

    Sorry it took so long to reply - was working on another project for a while.  Problem solved - used 8MHz stablized SMCLK as source, and have working 9600 bidirectional.

  • 0 in reply to Steven Burck
    Guru 227245 points
    With 8MHz stable source clock, you should not have any problems even with 115200Bd. So since you have verified that it was indeed the clock precision, you are now no longer limited to 9600Bd. :)

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