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PCB design Guidelines for MSP430

Hi,


I'm looking for PCB design guidelines when creating PCB with MSP430's. I was hoping there is a literature on this somewhere.

Thanks.

  • co tang87699 said:
    when creating PCB with MSP430's

     Hi some guidelines are present about low power xtal to avoid noise and possible refuse to start at all.

     About HF xtal some care must be done to isolate from external noise too and is mandatory if USB is present. Some cap as usual on pcb must be very close to power pin...

     But forever missing detail which one of huge family?

  • Is there not a single general guideline when designing PCB's with MSP430s or is each one is different?
  •  USB or not, if RF require more close rules due to RF impedance match an as RF in general too...

     Analog require have less noise.. Analog are different and many resolution/architecture span the family...

     So which device or subfamily?

     Application specific guidelines?

     PCB is an art, it must be done with knowledge or thing doesn't work.

  • What answer do you expect?
    PCB should be using proper electrical design for everything and a mcu don't have special rules that only apply to it.
    1: Use star (tree branch) pattern for Vdd and Vss
    2: Don't run digital traces under the crystal
    3: Protect the mcu from brownout with a inductor(or resistor) and a bulk cap
    4: Use a Ferrite Bead on Avdd, if the mcu have separate analog power input.

  • Well, I came across a stellaris guideline that was very well informed. It covers a general design with the stellais from PCB routing to chassis ground guidelines. I figure maybe if one exist for that product maybe one will exist for the MSP430. So the answer I expected was either Yes there is one or No there isn't one. And if there isn't one then I would move on to designing with the general PCB design like everything else.
  • co tang87699 said:
    Well, I came across a stellaris guideline that was very well informed.

     Uhm.. also old prematurely dead Stellaris was split across family to different chip if USB analog ENET or peripheral .. if you need general guideline ok but for PCB yes there are some application notes about crystal and specific one..

     MSP is different from Stellaris now TIVA and require different PCB routing rules. Rules come from application type, Stellaris has no differential high resolution AD, MSP is more complex or more simple.. Which one and what application?

  • For PCB layout with an MCU, the same guidelines apply that apply to any layout.
    There are almost no special guidelines for MSPs. An exception are specific considerations for low power crystals on 1x family (e.g. adding an additional load resistor to speed up settling, covered in a dedicated application note). Anything else is either common or obvious. Still the users guide and datasheets contain specific information if a certain detail is not just recommended but required for proper operation. Like splitting the supply capacitance to all VCC pins, if not all are connected to the supply, to ensure proper operation of the ports with high loads, or applying a storage capacitance to the reference output for higher sampling rates.
    All other things are what applies to any circuitry. Like having a separate GND for digital and analog supply (star-point at the supply GND), having a low-pass filter at the analog supply to reduce digital noise on the analog circuitry, guard traces and insulated GND plane for crystals, bypass capacitors between VCC and GND etc.
    And of course, when using a layout program, don't place all bypass capacitors in one corner because it is so easy to route. (don't laugh, have seen people doing it. I have even seen it in diagrams.).
    Always remember that traces have resistance and are an antenna (crosstalk, floating inputs etc.).
  • Jens-Michael Gross said:
    And of course, when using a layout program, don't place all bypass capacitors in one corner because it is so easy to route. (don't laugh, have seen people doing it. I have even seen it in diagrams.).

     Hi Jens, this is politically incorrect, you cannot write this good novel than disable laugh free... Ok I have seen a lot of these and also when all seems ok some strange interaction move current flow away from where we think has to be. Solid planes are the more confounding from where rf energy find conduction path.

     PCB designing is an art and need be learned day by day from guide, experience and good friends. I think guidelines not specific from stellaris are still good for MSP, some examples can be found on devkit or special layout recommendation on MSP specific folder.

     I wish you all the best for your day.

  • co tang87699 said:
    Is there not a single general guideline when designing PCB's with MSP430s

     I searched for a document I was inspecting some time ago, try if this can help you, all hardware are described and schematic and some guideline are present.

    http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=slau278&fileType=pdf

  • Okay, if you want, laugh. But at them :)

    Solid supply planes are not always the best solution.
    If you have a current running through a trace on a different layer, you'll notice a concentration of opposite current(s) on the other layers above/beneath it. A GND layer doesn't mean current will distribute evenly, it does not even mean GND currents take the shortest path back to the supply.
    Not to mention situations where you don't want any current flowing even though you want a GND shield. Like beneath a crystal (you need a trench on the GND around this area, connecting to the remaining GND panel only at one point, so all currents are routed around it)

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