I2C between MSP430F533x and fuel gague BQ27621-G1

Juninho,

start in small steps and look at the examples given by TI:

The following programs introduce the I²C operation of your device:

• msp430f66xx_uscib0_i2c_06.c       USCI_B0 I2C Master TX single bytes to MSP430 Slave
• msp430f66xx_uscib0_i2c_07.c       USCI_B0 I2C Slave RX single bytes from MSP430 Master
• msp430f66xx_uscib0_i2c_08.c       USCI_B0 I2C Master TX multiple bytes to MSP430 Slave
• msp430f66xx_uscib0_i2c_09.c       USCI_B0 I2C Slave RX multiple bytes from MSP430 Master
• msp430f66xx_uscib0_i2c_10.c       USCI_B0 I2C Master RX multiple bytes from MSP430 Slave
• msp430f66xx_uscib0_i2c_11.c       USCI_B0 I2C Slave TX multiple bytes to MSP430 Master

Dennis

Hi,

Thanks for the links and information. I have looked at your code examples. My problem currently is that I am getting NACK before byte sending in Master transmitter mode. I have only one master and one slave.
When master sets Start condition and go to while loop waiting on flag "sent" or "nack", the ISR function is called and both TX and NACK flags are up.

This is the code I have now:
void initI2C(uint8_t slave_address)
{

UCB1CTL1 |= UCSWRST; // Enable SW reset

P8SEL |= BIT5 + BIT6; // Assign I2C pins to USCI_B1

UCB1CTL0 = UCMST + UCMODE_3 + UCSYNC; // I2C Master, synchronous mode
UCB1CTL1 = UCSSEL_2 + UCSWRST; // Use SMCLK
UCB1BR0 = 80; // fSCL = SMCLK/UCBRx = ~100kHz // slau208 section 36.3.5 //80 ili 96 ili 100
UCB1BR1 = 0;
UCB1I2CSA = slave_address>>1; // Set slave address
UCB1CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB1IE |= UCRXIE + UCTXIE + UCNACKIE; // Enable RX interrupt

}

int I2CSend_B1(char* Command, unsigned int Length, uint8_t Address)
{
I2CNACKRcvd = 0;
TXDataSent = 0;

PTxData = Command;
TXByteCtr = Length;
UCB1I2CSA = Address;

while (UCB1CTL1 & UCTXSTP); // Ensure stop condition got sent
//while (UCB1STAT & (UCSCLLOW|UCBBUSY));
UCB1CTL1 |= UCTR + UCTXSTT; // I2C TX, start condition

while(TXDataSent == 0 && I2CNACKRcvd == 0);

if(I2CNACKRcvd == 1)
{
I2CNACKRcvd = 0;
return 1;
}

TXDataSent = 0;
return 0;
}

#pragma vector = USCI_B1_VECTOR
__interrupt void USCI_B1_ISR(void)
{
switch(__even_in_range(UCB1IV,12))
{
case 0: break; // Vector 0: No interrupts
case 2: break; // Vector 2: ALIFG
case 4: // Vector 4: NACKIFG
I2CNACKRcvd = 1;
UCB1IFG &= ~UCNACKIFG;
UCB1CTL1 |= UCTXSTP; // Generate I2C stop condition
break;
case 6: break; // Vector 6: STTIFG
case 8: break; // Vector 8: STPIFG
case 10: // Vector 10: RXIFG
RXByteCtr--; // Decrement RX byte counter
if (RXByteCtr > 0)
{
*PRxData++ = UCB1RXBUF; // Move RX data to address PRxData
if (RXByteCtr == 1) // Only one byte left?
UCB1CTL1 |= UCTXSTP; // Generate I2C stop condition
}
else
{
*PRxData = UCB1RXBUF; // Move final RX data to PRxData
}
break;
case 12: // Vector 12: TXIFG

if (TXByteCtr > 0) // Check TX byte counter
{
UCB1TXBUF = *PTxData++; // Load TX buffer
TXByteCtr--; // Decrement TX byte counter
}
else
{
UCB1CTL1 |= UCTXSTP; // I2C stop condition
UCB1IFG &= ~UCTXIFG; // Clear USCI_B0 TX int flag
TXDataSent = 1;
}
break;
default: break;
}
}

Thanks,
Juninho