I have a qustion on the sample code for MSP430F47176 using I2C connection.
In the "msp430x471x7_uscib0_i2c_09.c" file, the MSP430 receives data from
other MSP430 throught I2C.
However, in the sample code, I cannot understand what will trigger the TX ISR.
It seems there is no sentence where the UCB0TXBUF is set to trigger the TX ISR.
In the manual (slau056j.pdf), there is a description "The USCI module
automatically acknowledges the received data ..." in the 2nd sentence from
the top of page 21-12. So, does that mean when the I2C slave receives the data,
acknowledge is automatically sent and will trigger the TX ISR?
However, in the sample code, UCB0TXIE is not set. Does the TX ISR is called
even without setting UCB0TXIE?
I would like to use I2C for SD card module. For that purpose, I am studying
the sample code for TX and RX through I2C.
------
Below is the sample code (msp430x471x7_uscib0_i2c_09.c).
//******************************************************************************
// MSP430x471xx Demo - USCI_B0 I2C Slave RX multiple bytes from MSP430 Master
//
// Description: This demo connects two MSP430's via the I2C bus. The master
// transmits to the slave. This is the slave code. The interrupt driven
// data receiption is demonstrated using the USCI_B0 RX interrupt.
//
// /|\ /|\
// MSP430x471xx 10k 10k MSP430x471xx
// slave | | master
// ----------------- | | -----------------
// -|XIN P3.1/UCB0SDA|<-|---+->|P3.1/UCB0SDA XIN|-
// 32kHz | | | | | 32kHz
// -|XOUT | | | XOUT|-
// | P3.2/UCB0SCL|<-+----->|P3.2/UCB0SCL |
// | | | |
//
// K. Venkat
// Texas Instruments Inc.
// May 2009
// Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 4.11B
//******************************************************************************
#include "msp430x471x7.h"
unsigned char *PRxData; // Pointer to RX data
unsigned char RXByteCtr;
volatile unsigned char RxBuffer[5]; // Allocate 128 byte of RAM
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P3SEL |= BIT1+BIT2; // Assign I2C pins to USCI_B0
UCB0CTL1 |= UCSWRST; // Enable SW reset
UCB0CTL0 = UCMODE_3 + UCSYNC; // I2C Slave, synchronous mode
UCB0I2COA = 0x48; // Own Address is 048h
UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB0I2CIE |= UCSTPIE + UCSTTIE; // Enable STT and STP interrupt
IE2 |= UCB0RXIE; // Enable RX interrupt
while (1)
{
PRxData = (unsigned char *)RxBuffer; // Start of RX buffer
RXByteCtr = 0; // Clear RX byte count
__bis_SR_register(LPM0_bits + GIE); // Enter LPM0 w/ interrupts
// Remain in LPM0 until master
// finishes TX
__no_operation(); // Set breakpoint >>here<< and read
} // read out the RxData buffer
}
//------------------------------------------------------------------------------
// The USCIB0 data ISR is used to move received data from the I2C master
// to the MSP430 memory.
//------------------------------------------------------------------------------
#pragma vector = USCIAB0TX_VECTOR
__interrupt void USCIAB0TX_ISR(void)
{
*PRxData++ = UCB0RXBUF; // Move RX data to address PRxData
RXByteCtr++; // Increment RX byte count
}
//------------------------------------------------------------------------------
// The USCIB0 state ISR is used to wake up the CPU from LPM0 in order to
// process the received data in the main program. LPM0 is only exit in case
// of a (re-)start or stop condition when actual data was received.
//------------------------------------------------------------------------------
#pragma vector = USCIAB0RX_VECTOR
__interrupt void USCIAB0RX_ISR(void)
{
UCB0STAT &= ~(UCSTPIFG + UCSTTIFG); // Clear interrupt flags
if (RXByteCtr) // Check RX byte counter
__bic_SR_register_on_exit(CPUOFF); // Exit LPM0 if data was
} // received