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Hello TI E2E Community,
We have updated our prior post of "Diagnosing Common Development Problems and Tips & Info for TM4C Devices" with some new information and improved formatting. Due to the nature of this FAQ thread, we will be locking it from comments to keep the information streamlined and so we can add further content to the first page as needed.
This post will have an FAQ section and a general information section.
Frequently Asked Questions
1) Certain GPIO Ports are Not Working
Affected GPIO Ports for TM4C123x Devices:
Affected GPIO Ports for TM4C129x Devices:
Solution: The Port Pins C0-3, D7 and F0/E7 are locked pins for specific functionality of JTAG, NMI and NMI respectively. To use them in GPIO or any other function they need to be unlocked and commit register be set. The following example function shows how to unlock and commit the Pins "before" calling any GPIO Pin Configuration Function.
Step 1) Include Header files:
Step 2) Use the following code based on the required port and target device
HWREG(GPIO_PORTC_BASE+GPIO_O_LOCK) = GPIO_LOCK_KEY;
HWREG(GPIO_PORTC_BASE+GPIO_O_CR) |= (GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);
HWREG(GPIO_PORTD_BASE+GPIO_O_LOCK) = GPIO_LOCK_KEY;
HWREG(GPIO_PORTD_BASE+GPIO_O_CR) |= GPIO_PIN_7;
HWREG(GPIO_PORTF_BASE+GPIO_O_LOCK) = GPIO_LOCK_KEY;
HWREG(GPIO_PORTF_BASE+GPIO_O_CR) |= GPIO_PIN_0;
HWREG(GPIO_PORTC_AHB_BASE+GPIO_O_LOCK) = GPIO_LOCK_KEY;
HWREG(GPIO_PORTC_AHB_BASE+GPIO_O_CR) |= (GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3);
HWREG(GPIO_PORTD_AHB_BASE+GPIO_O_LOCK) = GPIO_LOCK_KEY;
HWREG(GPIO_PORTD_AHB_BASE+GPIO_O_CR) |= GPIO_PIN_7;
HWREG(GPIO_PORTE_AHB_BASE+GPIO_O_LOCK) = GPIO_LOCK_KEY;
HWREG(GPIO_PORTE_AHB_BASE+GPIO_O_CR) |= GPIO_PIN_7;
2) EK-TM4C123GXL Only: Issues with GPIO's PD0/PD1 or PB6/PB7
Observed Issue: One or more of PD0, PD1, PB6, and/or PB7 are exhibited unexpected behavior.
Solution: The EK-TM4C123GXL has a pair of zero ohm resistors populated which tie together: PD0 with PB6, and PD1 with PB7. These resistors are used only to support the Airmouse example that works in conjunction with the BOOSTXL-SENSHUB BoosterPack. They can be removed to allow the GPIO to operate independently as long as that example is not being currently used.
3) Code goes to FaultISR
Case 1: After enabling a peripheral, the program goes into FaultISR
Solution: The Enable Function writes to the SYSCTL.RCGCxxx Register for the xxx Peripheral. It takes 5 System Clock Cycles after which the peripheral will be addressable. It is advised to put a delay or even better get the Status of Ready from the Peripheral. The following code does the latter:
Case 2: FaultISR is entered during normal program execution
Typical Root Cause: Fault ISR means that the CPU has hit a condition either internally or externally (w.r.t peripherals) that it cannot resolve.
1. The Registers that need to be checked to begin analysis are the NVIC_FAULTSTAT and NVIC_FAULTADDR registers at absolute address 0xE000ED28 and 0xE000ED38.
2. Precise Bus Fault in NVIC_FAULTSTAT would mean that the address of Faulting location is captured in NVIC_FAULTADDR
3. Similarly every fault type mentioned has a cause associated to it, some being easy to diagnose and some being difficult to diagnose. In order to diagnose faults, refer to the following document that covers the different Fault Types: http://www.ti.com/lit/spma043
4. If a solution is not found after consulting SPMA043, post on E2E with details including the Fault Type and what steps have been taken to try and resolve the issue.
4) ROM boot loader is not working on custom TM4C129x board
Issue: Trying to invoke the ROM boot loader does not work as expected even with identical software being used from evaluating on EK-TM4C1294XL LaunchPad
Likely Root Cause: Errata Item ETH#03: http://www.ti.com/lit/spmz850
Solution: As per the data sheet the acceptable practice for Ethernet PHY enabled parts is a no connect (NC) to the RBIAS pin if on-chip PHY is not used. However the ROM Boot Loaders enable the Ethernet PHY when the Flash is erased for Ethernet PHY parts which causes the ROM Boot Loader to fail. Also if a 25MHz crystal is used without RBIAS resistor, then JTAG may not work.
A RBIAS resistor is required even if the application does not require the Ethernet PHY. In this case, a 4.7KOhm 10% tolerance resistor can be used in place of 4.87KOhm 1% tolerance resistor between the RBIAS pin and GND.
5) TM4C device does not enumerate in Windows 7/8/10 properly OR the Windows Device Drivers are not properly signed
Root Cause: The USB drivers for Windows are not up-to-date
Solution: Install the latest USB drivers from the following download: http://software-dl.ti.com/tiva-c/SW-TM4C/latest/exports/SW-TM4C-220.127.116.11.PATCH-1.0.zip
Note: For Windows 10, one USB example is currently not functional which is the USB Composite Device example. This is a known issue and has not been resolved yet.
If the purpose of using the Composite Device example was to evaluate a USB device example with a CDC port being enumerated, then use the following example project: 8233.usb_dev_cdcserial.zip
6) JTAG is not connecting on my custom TM4C board
Resource to review: TM4C JTAG Guide http://www.ti.com/lit/spma075
1) How to apply to use TI's USB VID and PID
TI allows reuse of TI's USB Vendor Identification Number (VID) and use of TI's assigned USB Product Identification Numbers (PID) under specific conditions. You can find the licensing terms in the link below.
The VID:PID application is now online and can be found at the following link.
Please fill out the application and read the licensing terms in detail.
2) Windows ICDI Drivers Download
The latest Windows ICDI drivers can be downloaded from: http://www.ti.com/tool/stellaris_icdi_drivers
3) Device Unlock can be executed with the XDS100v2 and XDS200 Debug along with CCS Uniflash.
For details on how to do this, see Section 5.3.2 of our TM4C JTAG Guide: http://www.ti.com/lit/spma075
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
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