Hi Folks,
I think, my querstion is not exactly belongs to the part number singed in the post, but it can be present most of the TM4C processors.
I have to implement H bridge drive. As the datasheet also mentioned, a dead-band time is required to turn OFF the active pair before the opposite one will turn ON,
My question is, what is the exact behavior, when the duty cycle is smaller than the dead-band time? Will the comparator events be "ignored"? How can I image these situtation?
(I mean "these" as this situation can be appear if the dutiy cycle is smaller that the dead-band time, or their sum is greather than the period time)
Regards,
Norbert