Hello,
I need lowest power for my device, current consumption should be below 1mA with working UART. Another one requirement for device - support of USB Host.
I checked all TI devices (MCU) and found, that only TIVA a most suitable solution, because MSP430 haven't USB Host at all.
At the same time only TM4C129 can be used because it current consumption is much better that TM4C123.
As we can see in datasheet
2.7 Power Management The Cortex-M4F processor sleep modes reduce power consumption: ■ Sleep mode stops the processor clock. ■ Deep-sleep mode stops the system clock and switches off the PLL and Flash memory.
Register 131: Universal Asynchronous Receiver/Transmitter Deep-Sleep Mode Clock Gating Control (DCGCUART), offset 0x818 The DCGCUART register provides software the capability to enable and disable the UART modules in deep-sleep mode. When enabled, a module is provided a clock. When disabled, the clock is disabled to save power. Important: This register should be used to control the clocking for the UART modules.
a. Total current in RUN, SLEEP and DEEPSLEEP modes is the sum of IDD and IDDA.
As I understand there are the only one way - clocking from LFIOSC because IDD will higher that 1 mA even All peripheral switched off .
There I got some doubts about configuration.
There are 2 clock sources - PIOSC and System clock. In datasheet:
Other Peripheral Clock Control In the UART and QSSI Clock Control Registers, users can choose between the system clock (SysClk), which is the default source for the baud clock, and an alternate clock. Note that there may be special considerations when configuring the baud clock.
System clock can be configured to work from LFIOC.
In datasheet I found another 2 notes:
Register 18: UART Clock Configuration (UARTCC), offset 0xFC8 The UARTCC register controls the baud clock source for the UART module. For more information, see the section called “Peripheral Clock Sources” on page 234. Note: If the PIOSC is used for the UART baud clock, the system clock frequency must be at least 9 MHz in Run mode.
Register 131: Universal Asynchronous Receiver/Transmitter Deep-Sleep Mode Clock Gating Control (DCGCUART), offset 0x818 The DCGCUART register provides software the capability to enable and disable the UART modules in deep-sleep mode. When enabled, a module is provided a clock. When disabled, the clock is disabled to save power. Important: This register should be used to control the clocking for the UART modules.
And looking similar post about same question on LM4F https://e2e.ti.com/support/microcontrollers/tiva_arm/f/908/t/187113?tisearch=e2e-sitesearch&keymatch=uart%20deep%20sleep, where described solution about clocking from 30 kHz.
Can you clarify next questions:
- Can UART be clocked from LFIOSC?
- Can be achieved power consumption below 1 mA in deep sleep with UART?
