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SmartReflex and OMAP4430

Trung Vo
Prodigy 70 points
Other Parts Discussed in Thread: TWL6032, TWL6040

Hi we are running Android Jelly Bean with kernel version Linux version 3.0.31 on an OMAP4430. We are trying to enable SmartReflex to try and reduce power consumption.

I see in the SmartReflex kernel code that SmartReflex class 3 is only compatible with OMAP343x, is this correct?

We therefore only enabled SmartReflex 1.5 in the kernel. I see that the SmartReflex 1.5 driver gets initialized but I don't know if it is actually working. "omapconf" says that all SmartReflex modules are disabled? Is that expected?

 Are there any settings that needs to be tuned to use SmartReflex? How can we verify that SmartReflex is actually working?

Please also note we are using a TWL6032 PMIC. Is there any setup required in the PMIC to enable SmartReflex?

Thanks.

  • 0
    TI__Mastermind 29520 points

    Hello Trung,

    #Q: I see in the SmartReflex kernel code that SmartReflex class 3 is only compatible with OMAP343x, is this correct?

    OMAP4430 supports two operational modes for SmartReflex voltage control:
    • Class-2 or software-controlled
    • Class-3 or hardware-controlled

    #Q: I see in the SmartReflex kernel code that SmartReflex class 3 is only compatible with OMAP343x, is this correct?

    No, SmartReflex class 3 is compatible with OMAP4430. AVS Class 1.5 and Class-3 are based on a closed loop system architecture.

    #Q: We therefore only enabled SmartReflex 1.5 in the kernel. I see that the SmartReflex 1.5 driver gets initialized but I don't know if it is actually working. "omapconf" says that all SmartReflex modules are disabled? Is that expected?

    #Q: We therefore only enabled SmartReflex 1.5 in the kernel. I see that the SmartReflex 1.5 driver gets initialized but I don't know if it is actually working. "omapconf" says that all SmartReflex modules are disabled? Is that expected?
     Are there any settings that needs to be tuned to use SmartReflex? How can we verify that SmartReflex is actually working?
    Please also note we are using a TWL6032 PMIC. Is there any setup required in the PMIC to enable SmartReflex?

    - The SmartReflex is always enabled. Could you check following registers by omapconf. They are needed to access TWL6032:

    PRM_VC_SMPS_SA
    PRM_VC_VAL_SMPS_RA_VOL
    PRM_VC_VAL_SMPS_RA_CMD
    PRM_VC_CFG_CHANNEL
    PRM_VC_CFG_I2C_MODE
    PRM_VC_CFG_I2C_CLK

    See if your SmartReflex module is enabled -  SRCONFIG[11] SRENABLE  0x1 - Enables the module

    There are three Smartreflex module at addresses:

    0x4A0D 9000
    0x4A0D B000
    0x4A0D D000

    You can use the following omapconf commands:
    Smart-Reflex (AVS)

    # ./omapconf dump sr [<mod>]


    # ./omapconf show sr [cfg]

    Print Smart-Reflex Adaptive Voltage Scaling (AVS) configuration, including Voltage Controller (VC) and Voltage Processor (VP) configurations ([cfg] may be omitted).

    Note SR sensors configuration will be hardly possible to get it in class 1.5, as SR sensors are disabled most of the time.

    # ./omapconf show sr status

    Print Smart-Reflex Adaptive Voltage Scaling (AVS) convergence status. Note SR sensors status will be hardly possible to get it in class 1.5, as SR sensors are disabled most of the time.

    For more information see - https://github.com/omapconf/omapconf/wiki

    Check arch/arm/plat-omap/Kconfig file if your SmartReflex AVS is set.

    Check arch/arm/mach-omap2/omap_hwmod_44xx_data.c if Smartreflex modules are defined.

    Best regards,

    Yanko

  • 0 in reply to Yanko Todorov-XID
    Prodigy 70 points

    Hi Yanko,

    Thanks for your reply. In the file  arch/arm/mach-omap2/smartreflex-class3.c I see the following code:

    /* Smartreflex Class3 init API to be called from board file */
    static int __init sr_class3_init(void)
    {
        /* Enable this class only for OMAP343x */
        if (!cpu_is_omap343x())
        return -EINVAL;

        pr_info("SmartReflex Class3 initialized\n");
        return sr_register_class(&class3_data);
    }

    It looks like the code will only enable SmartReflex class 3 for the OMAP343x. What do we need to do to enable class 3 on the OMAP4430. Is there a newer version of the code?

    Also can you comment on item 3.5 in this silicon errata document: http://www.ti.com/lit/er/swpz009q/swpz009q.pdf ? It says to use SmartReflex class 1.5 for better power consumption. Is that still correct?

    Thanks,

    Trung

  • 0 in reply to Trung Vo
    TI__Mastermind 29520 points

    Hello Trung,

    Yes, the workaround in errata document is correct.

    Class-1.5: Boot-Time Software Calibration with periodic Software Recalibration
    Class-3: Continuous Hardware Calibration

    SmartReflexTM Class-1.5 AVS procedure may want to be implemented to decrease the number of I2C accesses to change the voltage during SmartReflexTM Class-3 AVS.

    I will repeat again:

    There are three Smartreflex modules at addresses:

    0x4A0D 9000
    0x4A0D B000
    0x4A0D D000

    You can use the following omapconf commands:
    Smart-Reflex (AVS)

    # ./omapconf dump sr [<mod>]

    # ./omapconf show sr [cfg]

    Print Smart-Reflex Adaptive Voltage Scaling (AVS) configuration, including Voltage Controller (VC) and Voltage Processor (VP) configurations ([cfg] may be omitted).

    Could you send me a register dump with Smartreflex registers generated by omapconf?

    The version of code in the kernel is actual.

    I suggest you to check Smartreflex configuration in the following files:

    drivers/power/avs/Kconfig -

    menuconfig POWER_AVS
        tristate "Adaptive Voltage Scaling class support"
        help
          AVS is a power management technique which finely controls the
          operating voltage of a device in order to optimize (i.e. reduce)
          its power consumption.
          At a given operating point the voltage is adapted depending on
          static factors (chip manufacturing process) and dynamic factors
          (temperature depending performance).
          AVS is also called SmartReflex on OMAP devices.

          Say Y here to enable Adaptive Voltage Scaling class support.

    drivers/power/avs/Makefile -

    obj-$(CONFIG_POWER_AVS_OMAP)        += smartreflex.o

    drivers/power/avs/smartreflex.c - OMAP Smartreflex Driver

    I think that your issue with SR (AVS) is due to missing definitions for TWL6032. See the patch:

    https://gitorious.org/linux-omap4-dev/p-android-omap4-3_4/commit/02c5747

    Best regards,

    Yanko

  • 0 in reply to Yanko Todorov-XID
    Prodigy 70 points

    Hi Yanko,

    Our kernel configuration to enable Smartreflex look correct. We enabled SmartReflex class 1.5 only because the SmartReflex class 3 kernel code is not compatible with the OMAP4430. Please confirm that this is what we should do. Just to clarify things, our kernel is based on TI's release 4AJ.2.1.

    The default periodic Software re-calibration is set to 24hr. 24hr seems like a very long time, do you have a shorter recommended period for better power savings?

    The register dump you have requested are below:

    root@android:/data # ./omapconf dump sr                                        
    OMAPCONF (rev 1.63 built Tue Mar 19 18:16:50 PDT 2013)
     
    HW Platform Revision:
      OMAP4430 ES2.3 GP Device (STANDARD performance (1.0GHz))
      TWL6032  ES2.1 (EPROM rev52.0)
    Error: I2C Read failed
      UNKNOWN AUDIO IC
     
    SW Build Details:
      Build:
        Version: lean_jet_sun-user 4.1.2 JZO54K eng.linux-jenkins.20141128.003105 release-keys
        Pastry: Jelly Bean
        Type: user
        Date: Fri Nov 28 00:32:21 PST 2014
     
      Kernel:
        Version: 3.0.31
        Author: tvo@trung_ubuntu
        Toolchain: gcc version 4.4.3 (GCC)
        Type: #11 SMP PREEMPT
        Date: Fri Nov 28 10:40:42 PST 2014
     
    SR_MPU not accessible.
    SR_IVA not accessible.
    SR_CORE not accessible.
    |-----------------------------------------------------|
    | Reg. Name                 | Reg. Addr  | Reg. Val.  |
    |-----------------------------------------------------|
    | PRM_VC_SMPS_SA            | 0x4A307B88 | 0x00121212 |
    | PRM_VC_VAL_SMPS_RA_VOL    | 0x4A307B8C | 0x0055495B |
    | PRM_VC_VAL_SMPS_RA_CMD    | 0x4A307B90 | 0x00564A5C |
    | PRM_VC_VAL_CMD_VDD_CORE_L | 0x4A307B94 | 0x0E0E0B00 |
    | PRM_VC_VAL_CMD_VDD_MPU_L  | 0x4A307B98 | 0x0E0E0500 |
    | PRM_VC_VAL_CMD_VDD_IVA_L  | 0x4A307B9C | 0x15150500 |
    | PRM_VC_VAL_BYPASS         | 0x4A307BA0 | 0x00144912 |
    | PRM_VC_CFG_CHANNEL        | 0x4A307BA4 | 0x00001717 |
    | PRM_VC_CFG_I2C_MODE       | 0x4A307BA8 | 0x00000008 |
    | PRM_VC_CFG_I2C_CLK        | 0x4A307BAC | 0x0B00282C |
    |-----------------------------------------------------|

     

    root@android:/data # ./omapconf show sr                                        
    OMAPCONF (rev 1.63 built Tue Mar 19 18:16:50 PDT 2013)
     
    HW Platform Revision:
      OMAP4430 ES2.3 GP Device (STANDARD performance (1.0GHz))
      TWL6032  ES2.1 (EPROM rev52.0)
    Error: I2C Read failed
      UNKNOWN AUDIO IC
     
    SW Build Details:
      Build:
        Version: lean_jet_sun-user 4.1.2 JZO54K eng.linux-jenkins.20141128.003105 release-keys
        Pastry: Jelly Bean
        Type: user
        Date: Fri Nov 28 00:32:21 PST 2014
     
      Kernel:
        Version: 3.0.31
        Author: tvo@trung_ubuntu
        Toolchain: gcc version 4.4.3 (GCC)
        Type: #11 SMP PREEMPT
        Date: Fri Nov 28 10:40:42 PST 2014
     
    |--------------------------------------------------------------------------------------|
    | PRM VC Configuration        | VC_MPU           | VC_IVA           | VC_CORE          |
    |--------------------------------------------------------------------------------------|
    | Power IC Slave Address (SA) | 0x12             | 0x12             | 0x12             |
    | Voltage Reg. Addr (VOLRA)   | 0x55             | 0x49             | 0x5B             |
    | Command Reg. Addr (CMDRA)   | 0x56             | 0x4A             | 0x5C             |
    | Command Values:             |                  |                  |                  |
    |   ON                        | 0x0E (0.873580V) | 0x15 (0.962200V) | 0x0E (0.772580V) |
    |   ON-Low-Power (ONLP)       | 0x0E (0.873580V) | 0x15 (0.962200V) | 0x0E (0.772580V) |
    |   RET                       | 0x05 (0.759640V) | 0x05 (0.759640V) | 0x0B (0.734600V) |
    |   OFF                       | 0x00 (0.696340V) | 0x00 (0.696340V) | 0x00 (0.595340V) |
    |--------------------------------------------------------------------------------------|
     
    |-------------------------------------------------------------------------------|
    | SR HS-I2C Configuration        |                                              |
    |-------------------------------------------------------------------------------|
    | Double Filtering               | Disabled (rejects glitches < 1 SYSCLK cycle) |
    | Repeated Start Mode (SRMODEEN) | Disabled                                     |
    | High-Speed Mode (HSMODEEN)     | Enabled                                      |
    |   HS Master Code (HSMCODE)     | 0x00                                         |
    | I2C Clock Configuration:       |                                              |
    |   Low Period (HSSCLL)          | 0x0B (0.286us)                               |
    |   High Period (HSSCLH)         | 0x00 (0.000us)                               |
    |-------------------------------------------------------------------------------|
     
    |--------------------------------------------------------------------------------------------|
    | PRM VP Configuration              | VP_MPU           | VP_IVA           | VP_CORE          |
    |--------------------------------------------------------------------------------------------|
    | Mode                              | Disabled         | Disabled         | Disabled         |
    | Status                            | Idle             | Idle             | Idle             |
    | VC Response Timeout               | Enabled          | Enabled          | Enabled          |
    |   Timeout (SysClk cycles, us)     | 7680 (199us)     | 7680 (199us)     | 7680 (199us)     |
    | Error Gain (hex, mV/%%)           | 0x0C (1.519mV/%) | 0x0C (1.519mV/%) | 0x0C (1.519mV/%) |
    | Error Offset (hex, %%)            | 0x00 (0.000%)    | 0x00 (0.000%)    | 0x00 (0.000%)    |
    | Initial Voltage (step, V)         | 0x0E (0.873580V) | 0x15 (0.962200V) | 0x0E (0.772580V) |
    | MAX Voltage (step, V)             | 0x35 (1.367320V) | 0x2B (1.240720V) | 0x26 (1.076420V) |
    | MIN Voltage (step, V)             | 0x0B (0.835600V) | 0x0B (0.835600V) | 0x0B (0.734600V) |
    | Current Voltage (step, V)         | 0x0E (0.873580V) | 0x0E (0.873580V) | 0x0E (0.772580V) |
    | Force Update Wait (cycles, us)    | 273 (7us)        | 273 (7us)        | 273 (7us)        |
    | MAX Voltage Step                  | 0x04 (50.640mV)  | 0x04 (50.640mV)  | 0x04 (50.640mV)  |
    | SMPSWAITTIMEMAX (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |
    | MIN Voltage Step                  | 0x01 (12.660mV)  | 0x01 (12.660mV)  | 0x01 (12.660mV)  |
    | SMPSWAITTIMEMIN (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |
    |--------------------------------------------------------------------------------------------|
     
    All Smart-Reflex Modules disabled.
    All Smart-Reflex Modules disabled.

     

     

     

  • 0 in reply to Trung Vo
    TI__Mastermind 29520 points

    Hello Trung,

    Could you try to enable SmartReflex modules as enable the in PRCM configuration?

    Please set 0x2 in following registers:

    CM_ALWON_SR_MPU_CLKCTRL[1:0] MODULEMODE - 0x2: Module is explicitly enabled.
    CM_ALWON_SR_IVA_CLKCTRL[1:0] MODULEMODE - 0x2: Module is explicitly enabled.
    CM_ALWON_SR_CORE_CLKCTRL[1:0] MODULEMODE - 0x2: Module is explicitly enabled.

    Do you have any modification in kernel considering power management options?

    Best regards,

    Yanko

  • 0 in reply to Yanko Todorov-XID
    Prodigy 70 points

    Hi Yanko,

    We have no kernel modifications related to power management.

    Here is the omapconf dump after setting modulemode to 0x2 in all three registers:

    root@android:/data # ./omapconf dump sr
    OMAPCONF (rev 1.63 built Tue Mar 19 18:16:50 PDT 2013)
     
    HW Platform Revision:
      OMAP4430 ES2.3 GP Device (STANDARD performance (1.0GHz))
      TWL6032  ES2.1 (EPROM rev52.0)
    Error: I2C Read failed
      UNKNOWN AUDIO IC
     
    SW Build Details:
      Build:
        Version: lean_jet_sun-user 4.1.2 JZO54K eng.linux-jenkins.20141128.003105 release-keys
        Pastry: Jelly Bean
        Type: user
        Date: Fri Nov 28 00:32:21 PST 2014
     
      Kernel:
        Version: 3.0.31
        Author: tvo@trung_ubuntu
        Toolchain: gcc version 4.4.3 (GCC)
        Type: #13 SMP PREEMPT
        Date: Fri Nov 28 12:52:24 PST 2014
     
    |------------------------------------------------|
    | Reg. Name            | Reg. Addr  | Reg. Val.  |
    |------------------------------------------------|
    | SRCONFIG_MPU         | 0x4A0D9000 | 0x000C0003 |
    | SRSTATUS_MPU         | 0x4A0D9004 | 0x00000000 |
    | SENVAL_MPU           | 0x4A0D9008 | 0x05F8069C |
    | SENMIN_MPU           | 0x4A0D900C | 0xFFFFFFFF |
    | SENMAX_MPU           | 0x4A0D9010 | 0x00000000 |
    | SENAVG_MPU           | 0x4A0D9014 | 0x00000000 |
    | AVGWEIGHT_MPU        | 0x4A0D9018 | 0x00000000 |
    | NVALUERECIPROCAL_MPU | 0x4A0D901C | 0x00AAB09F |
    | IRQSTATUS_RAW_MPU    | 0x4A0D9024 | 0x00000000 |
    | IRQSTATUS_MPU        | 0x4A0D9028 | 0x00000000 |
    | IRQENABLE_SET_MPU    | 0x4A0D902C | 0x00000000 |
    | IRQENABLE_CLR_MPU    | 0x4A0D9030 | 0x00000000 |
    | SENERROR_MPU         | 0x4A0D9034 | 0x00000000 |
    | ERRCONFIG_MPU        | 0x4A0D9038 | 0x07007F80 |
    |------------------------------------------------|
     
    |-----------------------------------------------|
    | Reg. Name           | Reg. Addr  | Reg. Val.  |
    |-----------------------------------------------|
    | PRM_VP_MPU_CONFIG   | 0x4A307B58 | 0x000C0E08 |
    | PRM_VP_MPU_STATUS   | 0x4A307B5C | 0x00000001 |
    | PRM_VP_MPU_VLIMITTO | 0x4A307B60 | 0x350B1E00 |
    | PRM_VP_MPU_VOLTAGE  | 0x4A307B64 | 0x0001110E |
    | PRM_VP_MPU_VSTEPMAX | 0x4A307B68 | 0x00003704 |
    | PRM_VP_MPU_VSTEPMIN | 0x4A307B6C | 0x00003701 |
    |-----------------------------------------------|
     
    |------------------------------------------------|
    | Reg. Name            | Reg. Addr  | Reg. Val.  |
    |------------------------------------------------|
    | SRCONFIG_IVA         | 0x4A0DB000 | 0x000C0003 |
    | SRSTATUS_IVA         | 0x4A0DB004 | 0x00000000 |
    | SENVAL_IVA           | 0x4A0DB008 | 0x02BB02E5 |
    | SENMIN_IVA           | 0x4A0DB00C | 0xFFFFFFFF |
    | SENMAX_IVA           | 0x4A0DB010 | 0x00000000 |
    | SENAVG_IVA           | 0x4A0DB014 | 0x00000000 |
    | AVGWEIGHT_IVA        | 0x4A0DB018 | 0x00000000 |
    | NVALUERECIPROCAL_IVA | 0x4A0DB01C | 0x0099C7BC |
    | IRQSTATUS_RAW_IVA    | 0x4A0DB024 | 0x00000000 |
    | IRQSTATUS_IVA        | 0x4A0DB028 | 0x00000000 |
    | IRQENABLE_SET_IVA    | 0x4A0DB02C | 0x00000000 |
    | IRQENABLE_CLR_IVA    | 0x4A0DB030 | 0x00000000 |
    | SENERROR_IVA         | 0x4A0DB034 | 0x00000000 |
    | ERRCONFIG_IVA        | 0x4A0DB038 | 0x07007F80 |
    |------------------------------------------------|
     
    |-----------------------------------------------|
    | Reg. Name           | Reg. Addr  | Reg. Val.  |
    |-----------------------------------------------|
    | PRM_VP_IVA_CONFIG   | 0x4A307B70 | 0x000C1508 |
    | PRM_VP_IVA_STATUS   | 0x4A307B74 | 0x00000001 |
    | PRM_VP_IVA_VLIMITTO | 0x4A307B78 | 0x2B0B1E00 |
    | PRM_VP_IVA_VOLTAGE  | 0x4A307B7C | 0x0001110F |
    | PRM_VP_IVA_VSTEPMAX | 0x4A307B80 | 0x00003704 |
    | PRM_VP_IVA_VSTEPMIN | 0x4A307B84 | 0x00003701 |
    |-----------------------------------------------|
     
    |-------------------------------------------------|
    | Reg. Name             | Reg. Addr  | Reg. Val.  |
    |-------------------------------------------------|
    | SRCONFIG_CORE         | 0x4A0DD000 | 0x000C0003 |
    | SRSTATUS_CORE         | 0x4A0DD004 | 0x00000000 |
    | SENVAL_CORE           | 0x4A0DD008 | 0x02C202FE |
    | SENMIN_CORE           | 0x4A0DD00C | 0xFFFFFFFF |
    | SENMAX_CORE           | 0x4A0DD010 | 0x00000000 |
    | SENAVG_CORE           | 0x4A0DD014 | 0x00000000 |
    | AVGWEIGHT_CORE        | 0x4A0DD018 | 0x00000000 |
    | NVALUERECIPROCAL_CORE | 0x4A0DD01C | 0x0099C6B8 |
    | IRQSTATUS_RAW_CORE    | 0x4A0DD024 | 0x00000000 |
    | IRQSTATUS_CORE        | 0x4A0DD028 | 0x00000000 |
    | IRQENABLE_SET_CORE    | 0x4A0DD02C | 0x00000000 |
    | IRQENABLE_CLR_CORE    | 0x4A0DD030 | 0x00000000 |
    | SENERROR_CORE         | 0x4A0DD034 | 0x00000000 |
    | ERRCONFIG_CORE        | 0x4A0DD038 | 0x07007F80 |
    |-------------------------------------------------|
     
    |------------------------------------------------|
    | Reg. Name            | Reg. Addr  | Reg. Val.  |
    |------------------------------------------------|
    | PRM_VP_CORE_CONFIG   | 0x4A307B40 | 0x000C0F08 |
    | PRM_VP_CORE_STATUS   | 0x4A307B44 | 0x00000001 |
    | PRM_VP_CORE_VLIMITTO | 0x4A307B48 | 0x260B1E00 |
    | PRM_VP_CORE_VOLTAGE  | 0x4A307B4C | 0x0001110F |
    | PRM_VP_CORE_VSTEPMAX | 0x4A307B50 | 0x00003704 |
    | PRM_VP_CORE_VSTEPMIN | 0x4A307B54 | 0x00003701 |
    |------------------------------------------------|
     
    |-----------------------------------------------------|
    | Reg. Name                 | Reg. Addr  | Reg. Val.  |
    |-----------------------------------------------------|
    | PRM_VC_SMPS_SA            | 0x4A307B88 | 0x00121212 |
    | PRM_VC_VAL_SMPS_RA_VOL    | 0x4A307B8C | 0x0055495B |
    | PRM_VC_VAL_SMPS_RA_CMD    | 0x4A307B90 | 0x00564A5C |
    | PRM_VC_VAL_CMD_VDD_CORE_L | 0x4A307B94 | 0x0F0F0B00 |
    | PRM_VC_VAL_CMD_VDD_MPU_L  | 0x4A307B98 | 0x0E0E0500 |
    | PRM_VC_VAL_CMD_VDD_IVA_L  | 0x4A307B9C | 0x15150500 |
    | PRM_VC_VAL_BYPASS         | 0x4A307BA0 | 0x00144912 |
    | PRM_VC_CFG_CHANNEL        | 0x4A307BA4 | 0x00001717 |
    | PRM_VC_CFG_I2C_MODE       | 0x4A307BA8 | 0x00000008 |
    | PRM_VC_CFG_I2C_CLK        | 0x4A307BAC | 0x0B00282C |
    |-----------------------------------------------------|

     

    root@android:/data # ./omapconf show sr

    OMAPCONF (rev 1.63 built Tue Mar 19 18:16:50 PDT 2013)

     

    HW Platform Revision:

      OMAP4430 ES2.3 GP Device (STANDARD performance (1.0GHz))

      TWL6032  ES2.1 (EPROM rev52.0)

    Error: I2C Read failed

      UNKNOWN AUDIO IC

     

    SW Build Details:

      Build:

        Version: lean_jet_sun-user 4.1.2 JZO54K eng.linux-jenkins.20141128.003105 release-keys

        Pastry: Jelly Bean

        Type: user

        Date: Fri Nov 28 00:32:21 PST 2014

     

      Kernel:

        Version: 3.0.31

        Author: tvo@trung_ubuntu

        Toolchain: gcc version 4.4.3 (GCC)

        Type: #13 SMP PREEMPT

        Date: Fri Nov 28 12:52:24 PST 2014

     

    |--------------------------------------------------------------------------------------|

    | PRM VC Configuration        | VC_MPU           | VC_IVA           | VC_CORE          |

    |--------------------------------------------------------------------------------------|

    | Power IC Slave Address (SA) | 0x12             | 0x12             | 0x12             |

    | Voltage Reg. Addr (VOLRA)   | 0x55             | 0x49             | 0x5B             |

    | Command Reg. Addr (CMDRA)   | 0x56             | 0x4A             | 0x5C             |

    | Command Values:             |                  |                  |                  |

    |   ON                        | 0x0E (0.873580V) | 0x15 (0.962200V) | 0x0F (0.785240V) |

    |   ON-Low-Power (ONLP)       | 0x0E (0.873580V) | 0x15 (0.962200V) | 0x0F (0.785240V) |

    |   RET                       | 0x05 (0.759640V) | 0x05 (0.759640V) | 0x0B (0.734600V) |

    |   OFF                       | 0x00 (0.696340V) | 0x00 (0.696340V) | 0x00 (0.595340V) |

    |--------------------------------------------------------------------------------------|

     

    |-------------------------------------------------------------------------------|

    | SR HS-I2C Configuration        |                                              |

    |-------------------------------------------------------------------------------|

    | Double Filtering               | Disabled (rejects glitches < 1 SYSCLK cycle) |

    | Repeated Start Mode (SRMODEEN) | Disabled                                     |

    | High-Speed Mode (HSMODEEN)     | Enabled                                      |

    |   HS Master Code (HSMCODE)     | 0x00                                         |

    | I2C Clock Configuration:       |                                              |

    |   Low Period (HSSCLL)          | 0x0B (0.286us)                               |

    |   High Period (HSSCLH)         | 0x00 (0.000us)                               |

    |-------------------------------------------------------------------------------|

     

    |--------------------------------------------------------------------------------------------|

    | PRM VP Configuration              | VP_MPU           | VP_IVA           | VP_CORE          |

    |--------------------------------------------------------------------------------------------|

    | Mode                              | Disabled         | Disabled         | Disabled         |

    | Status                            | Idle             | Idle             | Idle             |

    | VC Response Timeout               | Enabled          | Enabled          | Enabled          |

    |   Timeout (SysClk cycles, us)     | 7680 (199us)     | 7680 (199us)     | 7680 (199us)     |

    | Error Gain (hex, mV/%%)           | 0x0C (1.519mV/%) | 0x0C (1.519mV/%) | 0x0C (1.519mV/%) |

    | Error Offset (hex, %%)            | 0x00 (0.000%)    | 0x00 (0.000%)    | 0x00 (0.000%)    |

    | Initial Voltage (step, V)         | 0x0E (0.873580V) | 0x15 (0.962200V) | 0x0F (0.785240V) |

    | MAX Voltage (step, V)             | 0x35 (1.367320V) | 0x2B (1.240720V) | 0x26 (1.076420V) |

    | MIN Voltage (step, V)             | 0x0B (0.835600V) | 0x0B (0.835600V) | 0x0B (0.734600V) |

    | Current Voltage (step, V)         | 0x0E (0.873580V) | 0x0F (0.886240V) | 0x0F (0.785240V) |

    | Force Update Wait (cycles, us)    | 273 (7us)        | 273 (7us)        | 273 (7us)        |

    | MAX Voltage Step                  | 0x04 (50.640mV)  | 0x04 (50.640mV)  | 0x04 (50.640mV)  |

    | SMPSWAITTIMEMAX (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |

    | MIN Voltage Step                  | 0x01 (12.660mV)  | 0x01 (12.660mV)  | 0x01 (12.660mV)  |

    | SMPSWAITTIMEMIN (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |

    |--------------------------------------------------------------------------------------------|

     

    |------------------------------------------------------------------------------------------------------|

    | SR Configuration             | SR_MPU                | SR_MM                 | SR_CORE               |

    |------------------------------------------------------------------------------------------------------|

    | SR Module                    | Disabled              | Disabled              | Disabled              |

    | SR_CLK Divider (SRCLKLENGTH) | 0x0C0 (192)           | 0x0C0 (192)           | 0x0C0 (192)           |

    | SR_CLK Frequency             | 100.000KHz            | 100.000KHz            | 100.000KHz            |

    |                              |                       |                       |                       |

    | Interrupt configuration      |                       |                       |                       |

    |   MCU DisableAck             | Disabled              | Disabled              | Disabled              |

    |   MCU Bounds                 | Disabled              | Disabled              | Disabled              |

    |   MCU Valid                  | Disabled              | Disabled              | Disabled              |

    |   MCU Accum                  | Disabled              | Disabled              | Disabled              |

    |   VP bounds                  | Disabled              | Disabled              | Disabled              |

    |                              |                       |                       |                       |

    | SR Sensors (N | P)           | Disabled              | Disabled              | Disabled              |

    |                              |                       |                       |                       |

    | Min/Max/Avg Detector Module  | Disabled              | Disabled              | Disabled              |

    |                              |                       |                       |                       |

    | Error Generator Module       | Disabled              | Disabled              | Disabled              |

    |   Idle Mode                  | Smart-Idle Wakeup     | Smart-Idle Wakeup     | Smart-Idle Wakeup     |

    |   WAKEUPENABLE               | Disabled              | Disabled              | Disabled              |

    |   ERRMINLIMIT                | -102.4% (0x80)        | -102.4% (0x80)        | -102.4% (0x80)        |

    |   ERRMAXLIMIT                | 101.6% (0x7F)         | 101.6% (0x7F)         | 101.6% (0x7F)         |

    |   ERRWEIGHT                  | 0x0 (0)               | 0x0 (0)               | 0x0 (0)               |

    |                              |                       |                       |                       |

    | Sensor Error                 |                       |                       |                       |

    |   Latest                     | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) |

    |   Average                    | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) |

    |------------------------------------------------------------------------------------------------------|

     

    |--------------------------------------------------------------------------|

    | SR Convergence Status | SR MPU         | SR IVA         | SR CORE        |

    |--------------------------------------------------------------------------|

    | SR Module             | Disabled       | Disabled       | Disabled       |

    | OPP                   | OPP50          | OPP50          | OPP50          |

    | Converged?            | YES            | YES            | YES            |

    | Voltage Error (%, mV) | 0.0% (0.000mV) | 0.0% (0.000mV) | 0.0% (0.000mV) |

    | Converged Voltage (V) | 0.873580V      | 0.759640V      | 0.785240V      |

    |--------------------------------------------------------------------------|

    Can you confirm that SmartReflex class 3 does not work with the OMAP4430 kernel and that SmartReflex 1.5 will yield better power savings. Can we adjust anything under SmartReflex 1.5 to make our power consumption lower?

    Thanks,

    Trung

     

  • 0 in reply to Trung Vo
    TI__Mastermind 29520 points

    Hello Trung,


    I have started to investigate your issue with SmartReflex configuration:

    At first, I will repeat the definitions for SmartReflex classes

    Class-1.5: Boot-Time Software Calibration with periodic Software Recalibration
    Class-3: Continuous Hardware Calibration

    OMAP4 supports both classes. OMAP4430 kernel support SmartReflex 1.5 for power saving. If you set your SmartReflex, it will lead to power save and lower consumption.

    For enabling SmartReflex I applied following settings in some registers. Please apply my steps and check if your SmartReflex modules are enabled:

    1. Step - Enable SmartReflex module in PRCM:

    CM_ALWON_SR_MPU_CLKCTRL -

    shell@android:/ # omapconf set bit 0x4A008628 1                            
    @0x4A008628: 0x00030000 ==> 0x00030002

    CM_ALWON_SR_IVA_CLKCTRL
    shell@android:/ # omapconf set bit 0x4A008630 1                                
    @0x4A008630: 0x00030000 ==> 0x00030002

    CM_ALWON_SR_CORE_CLKCTRL

    shell@android:/ # omapconf set bit 0x4A008638 1                                
    @0x4A008638: 0x00030000 ==> 0x00030002

    CM_ALWON_CLKSTCTRL
    shell@android:/ # omapconf read 0x4A008600                                     
    00001003
    shell@android:/ # omapconf clear bit 0x4A008600 0                              
    @0x4A008600: 0x00001003 ==> 0x00001F02

    2. Step - Enable Smart Reflex modules:

    MPU - SRCONFIG
    shell@android:/ # omapconf set bit 0x4A0D9000 11
    @0x4A0D9000: 0x000C0003 ==> 0x000C0803

    IVA - SRCONFIG

    shell@android:/ # omapconf set bit 0x4A0DB000 11                               
    @0x4A0DB000: 0x000C0003 ==> 0x000C0803

    CORE - SRCONFIG

    shell@android:/ # omapconf set bit 0x4A0DD000 11                               
    @0x4A0DD000: 0x000C0003 ==> 0x000C0803

    3. Step Voltage processor enable:

    PRM_VP_CORE_CONFIG

    shell@android:/ # omapconf set bit 0x4A307B40 0                            
    @0x4A307B40: 0x000C0E08 ==> 0x000C0E09

    PRM_VP_MPU_CONFIG
    shell@android:/ # omapconf set bit 0x4A307B58 0                                
    @0x4A307B58: 0x000C1108 ==> 0x000C1109

    PRM_VP_IVA_CONFIG
    shell@android:/ # omapconf set bit 0x4A307B58 0                                
    @0x4A307B58: 0x000C1108 ==> 0x000C1109

    shell@android:/ # omapconf show sr                                            
    OMAPCONF (rev 1.67 built Mon Aug 12 17:05:19 EEST 2013)

    HW Platform:
      Blaze
      OMAP4470 ES1.0 HS Device (HIGH performance (1.5GHz))
      TWL6032  ES1.1 (EPROM rev56.0)
      TWL6040  ES2.0

    SW Build Details:
      Build:
        Version: full_blaze-userdebug 4.2.2 JB_REL_master_blaze_3.4_MR1 170 test-keys
        Pastry: Jelly Bean
        Type: userdebug
        Date: Fri Jun 28 04:21:11 CDT 2013

      Kernel:
        Version: 3.4.48
        Author: x0166637@bluejay
        Toolchain: gcc version 4.6.x-google 20120106 (prerelease) (GCC)
        Type: #1 SMP PREEMPT
        Date: Fri Jun 28 04:06:38 CDT 2013

    |--------------------------------------------------------------------------------------|
    | PRM VC Configuration        | VC_MPU           | VC_IVA           | VC_CORE          |
    |--------------------------------------------------------------------------------------|
    | Power IC Slave Address (SA) | 0x12             | 0x12             | 0x12             |
    | Voltage Reg. Addr (VOLRA)   | 0x55             | 0x49             | 0x5B             |
    | Command Reg. Addr (CMDRA)   | 0x56             | 0x4A             | 0x5C             |
    | Command Values:             |                  |                  |                  |
    |   ON                        | 0x11 (0.911560V) | 0x15 (0.962200V) | 0x0E (0.873580V) |
    |   ON-Low-Power (ONLP)       | 0x11 (0.911560V) | 0x15 (0.962200V) | 0x0E (0.873580V) |
    |   RET                       | 0x05 (0.759640V) | 0x05 (0.759640V) | 0x05 (0.759640V) |
    |   OFF                       | 0x00 (0.696340V) | 0x00 (0.696340V) | 0x00 (0.696340V) |
    |--------------------------------------------------------------------------------------|

    |-------------------------------------------------------------------------------|
    | SR HS-I2C Configuration        |                                              |
    |-------------------------------------------------------------------------------|
    | Double Filtering               | Disabled (rejects glitches < 1 SYSCLK cycle) |
    | Repeated Start Mode (SRMODEEN) | Disabled                                     |
    | High-Speed Mode (HSMODEEN)     | Enabled                                      |
    |   HS Master Code (HSMCODE)     | 0x00                                         |
    | I2C Clock Configuration:       |                                              |
    |   Low Period (HSSCLL)          | 0x0B (0.286us)                               |
    |   High Period (HSSCLH)         | 0x00 (0.000us)                               |
    |-------------------------------------------------------------------------------|

    |--------------------------------------------------------------------------------------------|
    | PRM VP Configuration              | VP_MPU           | VP_IVA           | VP_CORE          |
    |--------------------------------------------------------------------------------------------|
    | Mode                              | Enabled          | Enabled          | Enabled          |
    | Status                            | Idle             | Idle             | Idle             |
    | VC Response Timeout               | Enabled          | Enabled          | Enabled          |
    |   Timeout (SysClk cycles, us)     | 7680 (199us)     | 7680 (199us)     | 7680 (199us)     |
    | Error Gain (hex, mV/%%)           | 0x0C (1.519mV/%) | 0x0C (1.519mV/%) | 0x0C (1.519mV/%) |
    | Error Offset (hex, %%)            | 0x00 (0.000%)    | 0x00 (0.000%)    | 0x00 (0.000%)    |
    | Initial Voltage (step, V)         | 0x11 (0.911560V) | 0x15 (0.962200V) | 0x0E (0.873580V) |
    | MAX Voltage (step, V)             | 0x37 (1.392640V) | 0x37 (1.392640V) | 0x27 (1.190080V) |
    | MIN Voltage (step, V)             | 0x05 (0.759640V) | 0x05 (0.759640V) | 0x05 (0.759640V) |
    | Current Voltage (step, V)         | 0x11 (0.911560V) | 0x09 (0.810280V) | 0x0E (0.873580V) |
    | Force Update Wait (cycles, us)    | 273 (7us)        | 273 (7us)        | 273 (7us)        |
    | MAX Voltage Step                  | 0x04 (50.640mV)  | 0x04 (50.640mV)  | 0x04 (50.640mV)  |
    | SMPSWAITTIMEMAX (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |
    | MIN Voltage Step                  | 0x01 (12.660mV)  | 0x01 (12.660mV)  | 0x01 (12.660mV)  |
    | SMPSWAITTIMEMIN (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |
    |--------------------------------------------------------------------------------------------|

    |------------------------------------------------------------------------------------------------------|
    | SR Configuration             | SR_MPU                | SR_MM                 | SR_CORE               |
    |------------------------------------------------------------------------------------------------------|
    | SR Module                    | Enabled               | Enabled               | Enabled               |
    | SR_CLK Divider (SRCLKLENGTH) | 0x0C0 (192)           | 0x0C0 (192)           | 0x0C0 (192)           |
    | SR_CLK Frequency             | 100.000KHz            | 100.000KHz            | 100.000KHz            |
    |                              |                       |                       |                       |
    | Interrupt configuration      |                       |                       |                       |
    |   MCU DisableAck             | Disabled              | Disabled              | Disabled              |
    |   MCU Bounds                 | Disabled              | Disabled              | Disabled              |
    |   MCU Valid                  | Disabled              | Disabled              | Disabled              |
    |   MCU Accum                  | Disabled              | Disabled              | Disabled              |
    |   VP bounds                  | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | SR Sensors (N | P)           | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | Min/Max/Avg Detector Module  | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | Error Generator Module       | Disabled              | Disabled              | Disabled              |
    |   Idle Mode                  | Smart-Idle Wakeup     | Smart-Idle Wakeup     | Smart-Idle Wakeup     |
    |   WAKEUPENABLE               | Disabled              | Disabled              | Disabled              |
    |   ERRMINLIMIT                | -102.4% (0x80)        | -102.4% (0x80)        | -102.4% (0x80)        |
    |   ERRMAXLIMIT                | 101.6% (0x7F)         | 101.6% (0x7F)         | 101.6% (0x7F)         |
    |   ERRWEIGHT                  | 0x0 (0)               | 0x0 (0)               | 0x0 (0)               |
    |                              |                       |                       |                       |
    | Sensor Error                 |                       |                       |                       |
    |   Latest                     | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) |
    |   Average                    | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) |
    |------------------------------------------------------------------------------------------------------|

    |--------------------------------------------------------------------------|
    | SR Convergence Status | SR MPU         | SR IVA         | SR CORE        |
    |--------------------------------------------------------------------------|
    | SR Module             | Enabled        | Enabled        | Enabled        |
    | OPP                   | OPP50          | OPP50          | OPP100_LOW     |
    | Converged?            | YES            | YES            | YES            |
    | Voltage Error (%, mV) | 0.0% (0.000mV) | 0.0% (0.000mV) | 0.0% (0.000mV) |
    | Converged Voltage (V) | 0.911560V      | 0.810280V      | 1.012840V      |
    |--------------------------------------------------------------------------|

    Best regards,

    Yanko

    shell@android:/ # omapconf show sr                                             
    OMAPCONF (rev 1.67 built Mon Aug 12 17:05:19 EEST 2013)

    HW Platform:
      Blaze
      OMAP4470 ES1.0 HS Device (HIGH performance (1.5GHz))
      TWL6032  ES1.1 (EPROM rev56.0)
      TWL6040  ES2.0

    SW Build Details:
      Build:
        Version: full_blaze-userdebug 4.2.2 JB_REL_master_blaze_3.4_MR1 170 test-keys
        Pastry: Jelly Bean
        Type: userdebug
        Date: Fri Jun 28 04:21:11 CDT 2013

      Kernel:
        Version: 3.4.48
        Author: x0166637@bluejay
        Toolchain: gcc version 4.6.x-google 20120106 (prerelease) (GCC)
        Type: #1 SMP PREEMPT
        Date: Fri Jun 28 04:06:38 CDT 2013

    |--------------------------------------------------------------------------------------|
    | PRM VC Configuration        | VC_MPU           | VC_IVA           | VC_CORE          |
    |--------------------------------------------------------------------------------------|
    | Power IC Slave Address (SA) | 0x12             | 0x12             | 0x12             |
    | Voltage Reg. Addr (VOLRA)   | 0x55             | 0x49             | 0x5B             |
    | Command Reg. Addr (CMDRA)   | 0x56             | 0x4A             | 0x5C             |
    | Command Values:             |                  |                  |                  |
    |   ON                        | 0x11 (0.911560V) | 0x15 (0.962200V) | 0x0E (0.873580V) |
    |   ON-Low-Power (ONLP)       | 0x11 (0.911560V) | 0x15 (0.962200V) | 0x0E (0.873580V) |
    |   RET                       | 0x05 (0.759640V) | 0x05 (0.759640V) | 0x05 (0.759640V) |
    |   OFF                       | 0x00 (0.696340V) | 0x00 (0.696340V) | 0x00 (0.696340V) |
    |--------------------------------------------------------------------------------------|

    |-------------------------------------------------------------------------------|
    | SR HS-I2C Configuration        |                                              |
    |-------------------------------------------------------------------------------|
    | Double Filtering               | Disabled (rejects glitches < 1 SYSCLK cycle) |
    | Repeated Start Mode (SRMODEEN) | Disabled                                     |
    | High-Speed Mode (HSMODEEN)     | Enabled                                      |
    |   HS Master Code (HSMCODE)     | 0x00                                         |
    | I2C Clock Configuration:       |                                              |
    |   Low Period (HSSCLL)          | 0x0B (0.286us)                               |
    |   High Period (HSSCLH)         | 0x00 (0.000us)                               |
    |-------------------------------------------------------------------------------|

    |--------------------------------------------------------------------------------------------|
    | PRM VP Configuration              | VP_MPU           | VP_IVA           | VP_CORE          |
    |--------------------------------------------------------------------------------------------|
    | Mode                              | Enabled          | Enabled          | Enabled          |
    | Status                            | Idle             | Idle             | Idle             |
    | VC Response Timeout               | Enabled          | Enabled          | Enabled          |
    |   Timeout (SysClk cycles, us)     | 7680 (199us)     | 7680 (199us)     | 7680 (199us)     |
    | Error Gain (hex, mV/%%)           | 0x0C (1.519mV/%) | 0x0C (1.519mV/%) | 0x0C (1.519mV/%) |
    | Error Offset (hex, %%)            | 0x00 (0.000%)    | 0x00 (0.000%)    | 0x00 (0.000%)    |
    | Initial Voltage (step, V)         | 0x11 (0.911560V) | 0x15 (0.962200V) | 0x0E (0.873580V) |
    | MAX Voltage (step, V)             | 0x37 (1.392640V) | 0x37 (1.392640V) | 0x27 (1.190080V) |
    | MIN Voltage (step, V)             | 0x05 (0.759640V) | 0x05 (0.759640V) | 0x05 (0.759640V) |
    | Current Voltage (step, V)         | 0x11 (0.911560V) | 0x09 (0.810280V) | 0x0E (0.873580V) |
    | Force Update Wait (cycles, us)    | 273 (7us)        | 273 (7us)        | 273 (7us)        |
    | MAX Voltage Step                  | 0x04 (50.640mV)  | 0x04 (50.640mV)  | 0x04 (50.640mV)  |
    | SMPSWAITTIMEMAX (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |
    | MIN Voltage Step                  | 0x01 (12.660mV)  | 0x01 (12.660mV)  | 0x01 (12.660mV)  |
    | SMPSWAITTIMEMIN (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |
    |--------------------------------------------------------------------------------------------|

    |------------------------------------------------------------------------------------------------------|
    | SR Configuration             | SR_MPU                | SR_MM                 | SR_CORE               |
    |------------------------------------------------------------------------------------------------------|
    | SR Module                    | Enabled               | Enabled               | Enabled               |
    | SR_CLK Divider (SRCLKLENGTH) | 0x0C0 (192)           | 0x0C0 (192)           | 0x0C0 (192)           |
    | SR_CLK Frequency             | 100.000KHz            | 100.000KHz            | 100.000KHz            |
    |                              |                       |                       |                       |
    | Interrupt configuration      |                       |                       |                       |
    |   MCU DisableAck             | Disabled              | Disabled              | Disabled              |
    |   MCU Bounds                 | Disabled              | Disabled              | Disabled              |
    |   MCU Valid                  | Disabled              | Disabled              | Disabled              |
    |   MCU Accum                  | Disabled              | Disabled              | Disabled              |
    |   VP bounds                  | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | SR Sensors (N | P)           | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | Min/Max/Avg Detector Module  | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | Error Generator Module       | Disabled              | Disabled              | Disabled              |
    |   Idle Mode                  | Smart-Idle Wakeup     | Smart-Idle Wakeup     | Smart-Idle Wakeup     |
    |   WAKEUPENABLE               | Disabled              | Disabled              | Disabled              |
    |   ERRMINLIMIT                | -102.4% (0x80)        | -102.4% (0x80)        | -102.4% (0x80)        |
    |   ERRMAXLIMIT                | 101.6% (0x7F)         | 101.6% (0x7F)         | 101.6% (0x7F)         |
    |   ERRWEIGHT                  | 0x0 (0)               | 0x0 (0)               | 0x0 (0)               |
    |                              |                       |                       |                       |
    | Sensor Error                 |                       |                       |                       |
    |   Latest                     | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) |
    |   Average                    | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) |
    |------------------------------------------------------------------------------------------------------|

    |--------------------------------------------------------------------------|
    | SR Convergence Status | SR MPU         | SR IVA         | SR CORE        |
    |--------------------------------------------------------------------------|
    | SR Module             | Enabled        | Enabled        | Enabled        |
    | OPP                   | OPP50          | OPP50          | OPP100_LOW     |
    | Converged?            | YES            | YES            | YES            |
    | Voltage Error (%, mV) | 0.0% (0.000mV) | 0.0% (0.000mV) | 0.0% (0.000mV) |
    | Converged Voltage (V) | 0.911560V      | 0.810280V      | 1.012840V      |
    |--------------------------------------------------------------------------|

  • 0 in reply to Yanko Todorov-XID
    Prodigy 70 points

    Hi Yanko,

    I have enabled the SmartReflex modules by following your instructions. Here is the new SR dump:

    root@android:/data # ./omapconf show sr
    OMAPCONF (rev 1.63 built Tue Mar 19 18:16:50 PDT 2013)
     
    HW Platform Revision:
      OMAP4430 ES2.3 GP Device (STANDARD performance (1.0GHz))
      TWL6032  ES2.1 (EPROM rev52.0)
    Error: I2C Read failed
      UNKNOWN AUDIO IC
     
    SW Build Details:
      Build:
        Version: lean_jet_sun-user 4.1.2 JZO54K eng.linux-jenkins.20141128.003105 release-keys
        Pastry: Jelly Bean
        Type: user
        Date: Fri Nov 28 00:32:21 PST 2014
     
      Kernel:
        Version: 3.0.31
        Author: tvo@trung_ubuntu
        Toolchain: gcc version 4.4.3 (GCC)
        Type: #13 SMP PREEMPT
        Date: Fri Nov 28 12:52:24 PST 2014
     
    |--------------------------------------------------------------------------------------|
    | PRM VC Configuration        | VC_MPU           | VC_IVA           | VC_CORE          |
    |--------------------------------------------------------------------------------------|
    | Power IC Slave Address (SA) | 0x12             | 0x12             | 0x12             |
    | Voltage Reg. Addr (VOLRA)   | 0x55             | 0x49             | 0x5B             |
    | Command Reg. Addr (CMDRA)   | 0x56             | 0x4A             | 0x5C             |
    | Command Values:             |                  |                  |                  |
    |   ON                        | 0x0E (0.873580V) | 0x15 (0.962200V) | 0x0F (0.785240V) |
    |   ON-Low-Power (ONLP)       | 0x0E (0.873580V) | 0x15 (0.962200V) | 0x0F (0.785240V) |
    |   RET                       | 0x05 (0.759640V) | 0x05 (0.759640V) | 0x0B (0.734600V) |
    |   OFF                       | 0x00 (0.696340V) | 0x00 (0.696340V) | 0x00 (0.595340V) |
    |--------------------------------------------------------------------------------------|
     
    |-------------------------------------------------------------------------------|
    | SR HS-I2C Configuration        |                                              |
    |-------------------------------------------------------------------------------|
    | Double Filtering               | Disabled (rejects glitches < 1 SYSCLK cycle) |
    | Repeated Start Mode (SRMODEEN) | Disabled                                     |
    | High-Speed Mode (HSMODEEN)     | Enabled                                      |
    |   HS Master Code (HSMCODE)     | 0x00                                         |
    | I2C Clock Configuration:       |                                              |
    |   Low Period (HSSCLL)          | 0x0B (0.286us)                               |
    |   High Period (HSSCLH)         | 0x00 (0.000us)                               |
    |-------------------------------------------------------------------------------|
     
    |--------------------------------------------------------------------------------------------|
    | PRM VP Configuration              | VP_MPU           | VP_IVA           | VP_CORE          |
    |--------------------------------------------------------------------------------------------|
    | Mode                              | Enabled          | Enabled          | Enabled          |
    | Status                            | Idle             | Idle             | Idle             |
    | VC Response Timeout               | Enabled          | Enabled          | Enabled          |
    |   Timeout (SysClk cycles, us)     | 7680 (199us)     | 7680 (199us)     | 7680 (199us)     |
    | Error Gain (hex, mV/%%)           | 0x0C (1.519mV/%) | 0x0C (1.519mV/%) | 0x0C (1.519mV/%) |
    | Error Offset (hex, %%)            | 0x00 (0.000%)    | 0x00 (0.000%)    | 0x00 (0.000%)    |
    | Initial Voltage (step, V)         | 0x0E (0.873580V) | 0x15 (0.962200V) | 0x0F (0.785240V) |
    | MAX Voltage (step, V)             | 0x35 (1.367320V) | 0x2B (1.240720V) | 0x26 (1.076420V) |
    | MIN Voltage (step, V)             | 0x0B (0.835600V) | 0x0B (0.835600V) | 0x0B (0.734600V) |
    | Current Voltage (step, V)         | 0x0E (0.873580V) | 0x0E (0.873580V) | 0x0F (0.785240V) |
    | Force Update Wait (cycles, us)    | 273 (7us)        | 273 (7us)        | 273 (7us)        |
    | MAX Voltage Step                  | 0x04 (50.640mV)  | 0x04 (50.640mV)  | 0x04 (50.640mV)  |
    | SMPSWAITTIMEMAX (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |
    | MIN Voltage Step                  | 0x01 (12.660mV)  | 0x01 (12.660mV)  | 0x01 (12.660mV)  |
    | SMPSWAITTIMEMIN (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |
    |--------------------------------------------------------------------------------------------|
     
    |------------------------------------------------------------------------------------------------------|
    | SR Configuration             | SR_MPU                | SR_MM                 | SR_CORE               |
    |------------------------------------------------------------------------------------------------------|
    | SR Module                    | Enabled               | Enabled               | Enabled               |
    | SR_CLK Divider (SRCLKLENGTH) | 0x0C0 (192)           | 0x0C0 (192)           | 0x0C0 (192)           |
    | SR_CLK Frequency             | 100.000KHz            | 100.000KHz            | 100.000KHz            |
    |                              |                       |                       |                       |
    | Interrupt configuration      |                       |                       |                       |
    |   MCU DisableAck             | Disabled              | Disabled              | Disabled              |
    |   MCU Bounds                 | Disabled              | Disabled              | Disabled              |
    |   MCU Valid                  | Disabled              | Disabled              | Disabled              |
    |   MCU Accum                  | Disabled              | Disabled              | Disabled              |
    |   VP bounds                  | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | SR Sensors (N | P)           | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | Min/Max/Avg Detector Module  | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | Error Generator Module       | Disabled              | Disabled              | Disabled              |
    |   Idle Mode                  | Smart-Idle Wakeup     | Smart-Idle Wakeup     | Smart-Idle Wakeup     |
    |   WAKEUPENABLE               | Disabled              | Disabled              | Disabled              |
    |   ERRMINLIMIT                | -102.4% (0x80)        | -102.4% (0x80)        | -102.4% (0x80)        |
    |   ERRMAXLIMIT                | 101.6% (0x7F)         | 101.6% (0x7F)         | 101.6% (0x7F)         |
    |   ERRWEIGHT                  | 0x0 (0)               | 0x0 (0)               | 0x0 (0)               |
    |                              |                       |                       |                       |
    | Sensor Error                 |                       |                       |                       |
    |   Latest                     | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) |
    |   Average                    | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) |
    |------------------------------------------------------------------------------------------------------|
     
    |--------------------------------------------------------------------------|
    | SR Convergence Status | SR MPU         | SR IVA         | SR CORE        |
    |--------------------------------------------------------------------------|
    | SR Module             | Enabled        | Enabled        | Enabled        |
    | OPP                   | OPP50          | OPP50          | OPP50          |
    | Converged?            | YES            | YES            | YES            |
    | Voltage Error (%, mV) | 0.0% (0.000mV) | 0.0% (0.000mV) | 0.0% (0.000mV) |
    | Converged Voltage (V) | 0.873580V      | 0.873580V      | 0.785240V      |
    |--------------------------------------------------------------------------|
     
    I see that all modules are enabled but I did not measure any improvement in current consumption compared to when I just enable SmartReflex 1.5 in the kernel. Is there something else we need to adjust?
  • 0 in reply to Trung Vo
    TI__Mastermind 29520 points

    Hello Trung,

    Yes, when you only enable SmartReflex system, you do not see significant improvement in power consumption. I suggest you to make some tests as change OPP settings on your system. 

    For example see following:

    Governors:
    cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_governors

    ondemand userspace performance conservative powersave

    View current governor:
    cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor - interactive  => echo userspace > scaling_governor

    View current frequency:
    cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq

    View current voltage:
    cat /sys/class/regulator/regulator.3/microvolts

    View Supported OPPs:
    cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies

    Change Frequency to 500MHz:
    echo 500000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed

    Suspend process:
    echo mem > /sys/power/state
    echo standby > /sys/power/state




    shell@android:/sys/devices/system/cpu/cpu0/cpufreq # cat scaling_governor      
    interactive

    shell@android:/sys/devices/system/cpu/cpu0/cpufreq # cat scaling_cur_freq      
    396800

    shell@android:/sys/devices/system/cpu/cpu0/cpufreq # cat scaling_governor
    userspace
    shell@android:/sys/devices/system/cpu/cpu0/cpufreq # cat scaling_available_fre>
    396800 800000 1100000 1300000 1500000
    > scaling_setspeed                                                            <
    shell@android:/sys/devices/system/cpu/cpu0/cpufreq # cat scaling_cur_freq  
    1100000

    When you change CPU frequency you will change the OPP, therefore it will change the power consumption:

    shell@android:/sys/power #
    127|shell@android:/sys/power # echo active > state
    1|shell@android:/sys/power # cat state
    mem
    shell@android:/sys/power # cd ..
    shell@android:/sys # cd ..
    shell@android:/ # omapconf show sr
    OMAPCONF (rev 1.67 built Mon Aug 12 17:05:19 EEST 2013)

    HW Platform:
      Blaze
      OMAP4470 ES1.0 HS Device (HIGH performance (1.5GHz))
      TWL6032  ES1.1 (EPROM rev56.0)
      TWL6040  ES2.0

    SW Build Details:
      Build:
        Version: full_blaze-userdebug 4.2.2 JB_REL_master_blaze_3.4_MR1 170 test-keys
        Pastry: Jelly Bean
        Type: userdebug
        Date: Fri Jun 28 04:21:11 CDT 2013

      Kernel:
        Version: 3.4.48
        Author: x0166637@bluejay
        Toolchain: gcc version 4.6.x-google 20120106 (prerelease) (GCC)
        Type: #1 SMP PREEMPT
        Date: Fri Jun 28 04:06:38 CDT 2013

    |--------------------------------------------------------------------------------------|
    | PRM VC Configuration        | VC_MPU           | VC_IVA           | VC_CORE          |
    |--------------------------------------------------------------------------------------|
    | Power IC Slave Address (SA) | 0x12             | 0x12             | 0x12             |
    | Voltage Reg. Addr (VOLRA)   | 0x55             | 0x49             | 0x5B             |
    | Command Reg. Addr (CMDRA)   | 0x56             | 0x4A             | 0x5C             |
    | Command Values:             |                  |                  |                  |
    |   ON                        | 0x29 (1.215400V) | 0x15 (0.962200V) | 0x19 (1.012840V) |
    |   ON-Low-Power (ONLP)       | 0x29 (1.215400V) | 0x15 (0.962200V) | 0x19 (1.012840V) |
    |   RET                       | 0x05 (0.759640V) | 0x05 (0.759640V) | 0x05 (0.759640V) |
    |   OFF                       | 0x00 (0.696340V) | 0x00 (0.696340V) | 0x00 (0.696340V) |
    |--------------------------------------------------------------------------------------|

    |-------------------------------------------------------------------------------|
    | SR HS-I2C Configuration        |                                              |
    |-------------------------------------------------------------------------------|
    | Double Filtering               | Disabled (rejects glitches < 1 SYSCLK cycle) |
    | Repeated Start Mode (SRMODEEN) | Disabled                                     |
    | High-Speed Mode (HSMODEEN)     | Enabled                                      |
    |   HS Master Code (HSMCODE)     | 0x00                                         |
    | I2C Clock Configuration:       |                                              |
    |   Low Period (HSSCLL)          | 0x0B (0.286us)                               |
    |   High Period (HSSCLH)         | 0x00 (0.000us)                               |
    |-------------------------------------------------------------------------------|

    |--------------------------------------------------------------------------------------------|
    | PRM VP Configuration              | VP_MPU           | VP_IVA           | VP_CORE          |
    |--------------------------------------------------------------------------------------------|
    | Mode                              | Enabled          | Disabled         | Enabled          |
    | Status                            | Idle             | Idle             | Idle             |
    | VC Response Timeout               | Enabled          | Enabled          | Enabled          |
    |   Timeout (SysClk cycles, us)     | 7680 (199us)     | 7680 (199us)     | 7680 (199us)     |
    | Error Gain (hex, mV/%%)           | 0x23 (4.431mV/%) | 0x0C (1.519mV/%) | 0x16 (2.785mV/%) |
    | Error Offset (hex, %%)            | 0x00 (0.000%)    | 0x00 (0.000%)    | 0x00 (0.000%)    |
    | Initial Voltage (step, V)         | 0x29 (1.215400V) | 0x15 (0.962200V) | 0x19 (1.012840V) |
    | MAX Voltage (step, V)             | 0x37 (1.392640V) | 0x37 (1.392640V) | 0x27 (1.190080V) |
    | MIN Voltage (step, V)             | 0x05 (0.759640V) | 0x05 (0.759640V) | 0x05 (0.759640V) |
    | Current Voltage (step, V)         | 0x29 (1.215400V) | 0x09 (0.810280V) | 0x19 (1.012840V) |
    | Force Update Wait (cycles, us)    | 273 (7us)        | 273 (7us)        | 273 (7us)        |
    | MAX Voltage Step                  | 0x04 (50.640mV)  | 0x04 (50.640mV)  | 0x04 (50.640mV)  |
    | SMPSWAITTIMEMAX (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |
    | MIN Voltage Step                  | 0x01 (12.660mV)  | 0x01 (12.660mV)  | 0x01 (12.660mV)  |
    | SMPSWAITTIMEMIN (cycles/step, us) | 55 (2us)         | 55 (2us)         | 55 (2us)         |
    |--------------------------------------------------------------------------------------------|

    |------------------------------------------------------------------------------------------------------|
    | SR Configuration             | SR_MPU                | SR_MM                 | SR_CORE               |
    |------------------------------------------------------------------------------------------------------|
    | SR Module                    | Enabled               | Enabled               | Enabled               |
    | SR_CLK Divider (SRCLKLENGTH) | 0x0C0 (192)           | 0x0C0 (192)           | 0x0C0 (192)           |
    | SR_CLK Frequency             | 100.000KHz            | 100.000KHz            | 100.000KHz            |
    |                              |                       |                       |                       |
    | Interrupt configuration      |                       |                       |                       |
    |   MCU DisableAck             | Disabled              | Disabled              | Disabled              |
    |   MCU Bounds                 | Disabled              | Disabled              | Disabled              |
    |   MCU Valid                  | Disabled              | Disabled              | Disabled              |
    |   MCU Accum                  | Disabled              | Disabled              | Disabled              |
    |   VP bounds                  | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | SR Sensors (N | P)           | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | Min/Max/Avg Detector Module  | Disabled              | Disabled              | Disabled              |
    |                              |                       |                       |                       |
    | Error Generator Module       | Disabled              | Disabled              | Disabled              |
    |   Idle Mode                  | Smart-Idle Wakeup     | Smart-Idle Wakeup     | Smart-Idle Wakeup     |
    |   WAKEUPENABLE               | Disabled              | Disabled              | Disabled              |
    |   ERRMINLIMIT                | -102.4% (0x80)        | -102.4% (0x80)        | -102.4% (0x80)        |
    |   ERRMAXLIMIT                | 101.6% (0x7F)         | 101.6% (0x7F)         | 101.6% (0x7F)         |
    |   ERRWEIGHT                  | 0x0 (0)               | 0x0 (0)               | 0x0 (0)               |
    |                              |                       |                       |                       |
    | Sensor Error                 |                       |                       |                       |
    |   Latest                     | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) |
    |   Average                    | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) | 0.0% (0x00) (Invalid) |
    |------------------------------------------------------------------------------------------------------|

    |--------------------------------------------------------------------------|
    | SR Convergence Status | SR MPU         | SR IVA         | SR CORE        |
    |--------------------------------------------------------------------------|
    | SR Module             | Enabled        | Enabled        | Enabled        |
    | OPP                   | OPP_TURBO      | OPP50          | OPP100_LOW     |
    | Converged?            | YES            | YES            | YES            |
    | Voltage Error (%, mV) | 0.0% (0.000mV) | 0.0% (0.000mV) | 0.0% (0.000mV) |
    | Converged Voltage (V) | 1.215400V      | 0.810280V      | 1.012840V      |
    |--------------------------------------------------------------------------|

    Please read the following sources:

    https://www.kernel.org/doc/Documentation/power/basic-pm-debugging.txt

    http://processors.wiki.ti.com/index.php/AM37x_Power_Management_User_Guide#Power_Stats_and_Active_Clocks

    https://www.kernel.org/doc/Documentation/ABI/testing/sysfs-power

    There is a detail description of OPPs in OMAP in OMAP4430 TRM.

    Best regards,

    Yanko

  • 0 in reply to Yanko Todorov-XID
    Prodigy 70 points

    Hi Yanko,

    If I follow your instructions to manually enable SmartReflex 3, it seems like the current consumption increases compared to just having SmartReflex 1.5 enabled in the kernel. Is this expected?

  • 0 in reply to Trung Vo
    TI__Mastermind 29520 points
    Hello Trung,

    It is expected, because you enable more power domains and modules in OMAP.

    Best regards,
    Yanko
  • 0 in reply to Yanko Todorov-XID
    Prodigy 70 points

    Hi Yanko,

    So in terms on power consumption it is better to use SmartReflex 1.5 instead of SmartReflex 3? We want maximum power savings.

  • 0 in reply to Trung Vo
    TI__Mastermind 29520 points

    Hello Trung,

    The definitions for SmartReflex class 1.5 and class 3 are:

    Class-1.5: Boot-Time Software Calibration with periodic Software Recalibration

    Class-3: Continuous Hardware Calibration

    SmartReflex Class-1.5 AVS procedure is implemented to decrease the number of I2C accesses to change the voltage during SmartReflex Class-3 AVS. This strategy detects and stores the unique calibrated voltage (Optimized Voltage) per OPP on a voltage domain for

    the given chip.

    For OMAP4430 recommended AVS class is 1.5.


    Best regards,

    Yanko