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Regarding TPS3110K33DBVR supervisory watch dog input

Amit Kumar2
Prodigy 50 points
Other Parts Discussed in Thread: TPS3110

Dear Sir,

I am using TPS3110K33DBVR ic in my board. Reset of this IC is connected to my DSP(TMS320C6745DPTPD4) and watchdog of supervisory is connected to one of the GPIO of DSP. I am using a SPI flash for DSP code storage. My code size is 144 KB. ALso i have a 2 pin jumper between reset of supervisory to reset of DSP to isolate the reset signal wherever required.

Current problem:

After power on reset DSP has to toggle the WDI, which I have written the code to toggle at every 300ms but DSP is not able to boot because supervisory is continuously giving reset to DSP.

Please check the diagram given in data sheet. I need to know what is the time from POR to WDI toggling at the start which is indicated in circle in the figure.

Also If I disconnect reset signal(by removing the jumper)  from supervisory to DSP, at that time DSP is able to boot and WDI out from DSP is coming properly. And the time between reset signal(DSP side) going high to WDI toggling is 700 ms. My doubt is whether DSP is taking more time to boot (since it is an SPI flash) and not able to toggle the WDI within the time needed for supervisory because of that supervisory is issuing the reset.

Please clarify.

Regards

Amit

  • 0
    TI__Guru 55940 points

    Hi Amit,

    The Watchdog timer is initiated when /RESET goes high. A transition on WDI must be generated during the timeout period (1.1s typically) after /RESET goes to the high logic level. If the DSP is taking more than the timeout period to boot and generate a transition on WDI, a reset signal is expected.

    The watchdog functionality for TPS3110 is not able to be disabled while the DSP is booting; however, we do have several supervisor families that do have watchdogs that can be disabled. Please see this Application Report for reference:

    www.ti.com/.../slva145.pdf

    Very Respectfully,
    Ryan

  • 0 in reply to Ryan Eslinger
    Prodigy 50 points

    Dear Ryan,

    Thanks for the update. In my application DSP is taking around 700 ms for booting. That is verified be disconnecting the reset signal from supervisory to DSP. In this case I have probed the reset and WDI from DSP and there is 700ms of delay between reset goes high to WDI  coming from DSP. But when i connect reset from supervisory in that case DSP is not able to boot. Since booting time is 700ms then supervisory shouldn't give reset because watchdog time out is 1.1sec.

    Amit

  • 0 in reply to Amit Kumar2
    Prodigy 50 points

    Dear All,

    I am happy to inform you that reset issue is solved. I would like to share the problem and how it got fixed.


    Actually there was a problem with boot mode pin logic level at POR.

    Problem:

    Boot7 pin should be low after reset is released but it was going high before reset was released. This pin is a multiplexed pin with SPI1 clock and this is connected to one more IC via a isolator. So at POR there was no activity at input of isolator and isolator was making this pin high before POR even though  it is pulled down.

    Solution:

    This pin I have pulled it down at IC side side through a 10k resistor. In this case, value at this pin is going high after reset is released.

    Please check the isolator condition when input from IC is not active:

    Regards

    Amit