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TPS3606-33: Battery Freshness seal activation

gautam jotkar
Expert 1165 points
Part Number: TPS3606-33

The query is regarding the battery freshness mode activation.

 We are following the below sequence to activated BFM mode

We need to know:

  1. What is the recommended time till PFI (Step 3) remain high before we execute Step 5 (Drive MR low).
  2. Also we are facing one issue in which IC is not getting into BFM mode when Battery Voltage (VBAT) is less than 2.9V.

 

Please guide us regarding the above issues.

The battery freshness seal of the TPS3606 family disconnects the backup battery from the internal circuitry until
it is needed. This ensures that the backup battery connected to VBAT is fresh when the final product is put to
use. The following steps explain how to enable the freshness seal mode:
1. Connect VBAT (VBAT > VBAT(min))
2. Ground PFO
3. Connect PFI to VDD or PFI > V(PFI)
4. Connect VDD to power supply (VDD > VIT)
5. Ground MR
6. Power down VDD
7. The freshness seal mode is entered and pins PFO and MR can be disconnected.
The battery freshness seal mode is disabled by the positive-going edge of RESET when VDD is applied.


  • 0
    TI__Genius 12630 points
    Gautam,

    1. After you connect VDD to the power supply, then you drive /MR low. There is no timing requirement for this action. Must be longer than 5us for VDD to be recognized.

    2. Does Vout fall below V(SWN) and Vbat is > than Vdd? Please provide scope capture of the event to help clarify what might be happening. I will try to troubleshoot it with you. Thanks!

    -Michael
  • 0 in reply to gautam jotkar
    Expert 1165 points
    Hi Michael,
    I have attached PDF explaining our issue. I have also attached circuit diagram of our implementation.
    We can have a telephonic or video call to understand the issue batter.
  • 0 in reply to gautam jotkar
    TI__Genius 12630 points
    Gautam,

    The battery freshness seal mode is entered when VDD is powered down. Can you provide VDD and Vout traces on your scope capture? The idea is that you follow the battery freshness seal steps and then when VDD powers down, the battery freshness is sealed. When VDD powers back up, the battery freshness seal is disabled and the battery can then be used if needed.

    -Michael
  • 0 in reply to Michael_DeSando
    Expert 1165 points

    Hello Michael,

        1) OK

      2) I have checked the voltages. See the file attached. It is uploaded with the scope captures. The Vout is 3.16V Should this be in the range of VSWN?

      What could be the reason for the current through the Vout pin to go low before the MR pin is going low ?

      Is it BFM or some other mode?BFM mode using TP3606 update 190218.pdf

    Regards,

      Gautam

  • 0 in reply to gautam jotkar
    TI__Genius 12630 points

    Gautam,

    Vout should either be Vdd until Vdd drops to V(SWN) then Vout switched to Vbat. What is Vbat in each scope capture?

    Vout current will drop as Vdd drops. This is normal. Once Vdd drops below V(SWN) then Vout will switch to Vbat which might cause Vout to jump up in voltage depending on the value of Vbat compared to Vdd.

    Manual reset is internally pulled up to VDD or Vbat depending on which one is switched into the circuit. This is also connected to Vout. Manual reset is not influencing Vout voltage or current, it is either Vdd or Vbat. As long as Vout is still within spec, the device is working correctly.

    Please check the Vdd, Vbat, and Vout voltage with respect to each other to determine if the device output is functioning correctly. If Vout is not following Vdd or Vbat then please let me know. Thanks!

    -Michael

  • 0 in reply to Michael_DeSando
    Expert 1165 points

    Hello Michael,

     I have a query again on the TPS3606.  As you are aware we are using this part and the BFM functionality. Below is the query.

    1) we detect the falling auxiliary supply voltage on the pin PFI. Once the Voltage at this PFI goes below Vpfi the PFO gives an interrupt to the microcontroller.

    2) microcontroller converts it's pin connected to PFO as an output and grounds it.

    3) The microcontroller drives the PFI pin High through another GPIO pin. (This is to put the IC into BFM mode).

    and the other subsequent steps of putting the TPS3606 into BFM are followed.

    The query is in this step 3. Since the PFI is driven high (above Vpfi), the TPS3606 should be trying to drive the PFO output pin to High level.

    But at the same time the microcontroller is already holding the PFO pin to ground.

    Should this conflicting driving levels cause any problem to the TPS3606 or to the microcontroller ?

    The PFI Input  in driven through a diode ORing. See attached schematic description.

    Regards,

      Gautam

  • 0 in reply to gautam jotkar
    TI__Genius 12630 points
    Gautam,

    When you ground PFO in step 2, VDD has not been applied yet. There should be no damage after this step. After following the remaining steps, the freshness seal mode is entered and PFO and MR can be disconnected.

    Please let me know if the device is not behaving has you expect it after following these steps.

    -Michael
  • 0 in reply to Michael_DeSando
    Expert 1165 points
    Hi Michael,
    my query was in step 3.
    In step 3 we male the PFI input high, when the output PFO is forcefully grounded. (Though the TPS3606 would try to drive the PFO high, since PFI is driven high).
    Hope you understood my query? Awaiting your reply on this.

    In the meanwhile we have observed one more issue.
    At certain times the Supervisory output VOUT does not give any output voltages at power ON.
    Though the PFI & VDD is high voltage, the VOut is showing low.
    I have noted the various voltages on the TPS3606 pins and mentioned them below.

    Vout : 0.291V
    VDD: 3.293V
    GND : 0V
    MSWITCH : 0.221V
    PFI: 1.421V
    PFO: 0.06V
    MR: 0.288V
    WDI: 0.288V
    RESET: 0.004V
    VBAT: 3.6V

    When this error state is entered the card does not get powered ON even after multiple Power ON OFF cycles.
    We have to disconnect the card from the system (including battery) to get it working normally.
    Could you let us know what the problem could be ? Why is the Vout not giving the right voltage even when right power input is available on VDD & PFI ?

    Awaiting your quick reply.
    Thanks,
    with best regards,
    Vinayak

    NOTE : The above information shared with you is confidential.
  • 0 in reply to gautam jotkar
    TI__Genius 12630 points

    Vinayak,

    That is the correct sequence to put the device into battery freshness seal. There is an internal switch that will switch the battery out of the circuit so there is no leakage until the VDD comes up during normal power up. Do you see this sequence causing the device to misbehave?

    The Vout should never be lower than VDD or Vbat when power is up. Can you provide a timing scope capture showing when the Vout drops low during the battery freshness seal sequence?

    Note: these E2E forums are public meaning anyone can see this information. For confidential or sensitive information, please email me directly at michaeldesando@ti.com

    -Michael