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RTOS/PROCESSOR-SDK-AM437X: Problem writing more than 1 byte at a time in MMAP mode with QSPI. TI AM437x

Part Number: PROCESSOR-SDK-AM437X
Other Parts Discussed in Thread: AMIC120

Tool/software: TI-RTOS

Currently right now in the drivers provided. in S25FL.c, Line 22 is set to 1, which means that the drivers can only write 1 byte at a time. 

How do you go about making this code more efficient?

if(QSPI_OPER_MODE_MMAP == object->qspiMode)
{
	if (dstOffstAddr > 0xFFFFFFU)
	{
		transferCmd  = QSPI_LIB_CMD_PAGE_PRG_4B;
		S25FLFlash_Enable4ByteAddrMode(flashHandle, true);
	}
	else
	{
		transferCmd  = QSPI_LIB_CMD_PAGE_PRG;
	}

	for(idx = 0; idx < length; idx++)
	{
		/* Write enable */
		S25FLFlash_WriteEnable(flashHandle);

		/* Perform the transfer */
		transaction.txBuf = (unsigned char *)dstOffstAddr;
		transaction.rxBuf = srcAddr;

		transaction.count = 1;

		transferType = SPI_TRANSACTION_TYPE_WRITE;

		SPI_control(handle, SPI_V1_CMD_TRANSFERMODE_RW, (void *)&transferType);
		SPI_control(handle, SPI_V1_CMD_MMAP_TRANSFER_CMD, (void *)&transferCmd);
		retVal = SPI_transfer(handle, &transaction);

		/* Check flash status for completion */
		while ((FlashStatus(flashHandle) & 0x1U));

		dstOffstAddr += 1;
		srcAddr += 1;
	}

	if (dstOffstAddr > 0xFFFFFFU)
	{
		S25FLFlash_Enable4ByteAddrMode(flashHandle, false);
	}
}

In the Technical Reference Manual: AM437x and AMIC120 ARM Cortex-A9 Processors

It says: 

"The QSPI supports long transfers through a frame-style sequence. In its generic SPI use mode, a word can be defined up to 128 bits and multiple words can be transferred during a single access. For each word, a device initiator must read or write the new data and then tell the QSPI to continue the current operation. Using this sequence, a maximum of 4096 128-bit words can be transferred in a single SPI read or write  operation. This allows great flexibility when connecting the QSPI to various types of devices."

 

Any help to solve this problem/Make this more efficient would be greatly appreciated.

 

-Chris