Part Number: DP83TC813R-Q1
Hi team,
How to set the DP83TC813 internal PUPD? Is it the flow of examining default settings in SI simulation, measuring actual equipment, and then setting up PU/PD?
And in the ibis model, what is the PU/PD setting for the…
Part Number: DP83TC813R-Q1 Other Parts Discussed in Thread: LMK6C Hello,
Is there a recommended 50-Mhz oscillator for use with the DP83TC813R-Q1 when used in RMII slave mode? I am looking at TI's LMK6CE05000CDLF - is that a good option? If so, is there…
Part Number: DP83TC813R-Q1
Hello, Mellin
I continue my questions in email here.
the 100Mbase-T1 RGMII operates in shift mode, communicating with SOC.
in the email, your reply is as below:
1. about RGMII OUTPUT TIMING:
the RX timing parameters are specified…
Part Number: DP83TC813R-Q1 team,
Can you please advise what are the consequences of exceeding max RX rise/fall times ?
Is there a equation ruling rise and fall time as a fonction of the capacitive load ? as the timing is provided for 5pf.
thanks
Part Number: DP83TC813R-Q1 Hi team,
My customer have question for tR/tF(RGMII).
In datasheet, Max tR/tF value is 1.2ns. Is this 100Base-T1 standard value?
Is there possibility that the tR/tF of the RGMII RXC (PHY sent to SoC) exceed this value with a PHY…
Part Number: DP83TC813R-Q1 Hello All,
The topic is about reading EthPhy Registers: T X_PKT_CNT , RX_PKT_CNT and especially RX_PKT_CNT_3 I have a couple of questions that would appreciate answers for them:
1- What is the proper way to read the registers TX_…
Part Number: DP83TC813R-Q1 team, customer is testing out the timing they get on the RGMII, it doesnt seem to match our requirement completely, can you please comment ? customer is in cc
I have some other questions about the signal test. Please help c…
Part Number: DP83TC813R-Q1 Hi,
I notice some devices describe common mode termination is optional. I wonder what is the function of this? Can this be removed?
Part Number: DP83TC813R-Q1 Hi, we want to use the DP83TC813 PHY in our product. So, there is prototype board with the chip. When testing the chip we had some problems with CLKOUT/LED1 GPIO. We are not able to configure it with SW to be LED1 and not CLKOUT…