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  • DRA712: QNX with DRA712

    Resolved
    Part Number: DRA712 Other Parts Discussed in Thread: PROCESSOR-SDK-DRA7X Hi Champs, Our customer will hire QNX for the OS and develop the SW for DRA712. Could you please let me clarify a couple things as follows: 1) Is PROCESSOR-SDK-DRA7X workable with QNX…
    • Resolved

  • RE: DRA712: There is a problem with the decoding part

    Hi San Zhang, san zhang said: viddec3test version is 1.0.0-r19 ,SDK version is dra7xx-evm-03_02_00_03. We are not actively supporting SDK version 3.02.00.03 any more. If you can provide the following: Binaries/Sources to replicate the issue with the…
    • Answered

  • DRA712: DRA712 CPU frequency settings

    Resolved
    Part Number: DRA712 Hello. We use a DRA712 processor. We need to change the CPU frequency in the linux device tree and make it run at 600 MHz. In accordance with the Power Management section of the processor SDK Linux: 1. We checked that all relevant config…
    • Resolved

  • RE: DRA712: Sharing data between IPU (SYS/BIOS) and MPU (Linux) cores

    Hi Szymon, 1. Yes, there is no automatic feedback from IPC for message dispatch. remote application has to send an explicit ACK message in order to have this feedback mechanism. 2. MessageQ provides standard user space interface for Linux to sys/BIOS…
    • Answered

  • RE: DRA714: supported debug tools for DRA712

    Resolved
    Hi, You can use GDB, KGDB for A15 Linux debugging & XDS560v2 debugger for RTOS debugging. Thanks Gaviraju

  • DRA712: Trouble building J6 Early CAN demo on SDK 6.00

    TI Thinks Resolved
    Part Number: DRA712 Re-opening this inquiry for customer now that project has been commissioned on SDK 6.00. Previous investigation pointed to an issue with 6.00 defconfig but it was never resovled. =====================================================…

  • DRA712: Linux Frequency settings

    TI Thinks Resolved
    Part Number: DRA712 Hello. We use DRA712 SoC in our project. We need to configure the linux u-boot and the kernel such a way, that the frequency of modules does not exceed limits for this SoC. DEVICE SPEED MAXIMUM FREQUENCY (MHz) MPU 600 DS…
    • Answered

  • DRA712: how to shutdown DSP

    Resolved
    Part Number: DRA712 Hi, expert: My customer use DRA712 for configurable digital cluster application. The A15 core runs QNX 6.6. Customer checked the vdda_dsp_iva power rail, it shows about >200mA current. As there is no DSP in DRA712, we want to totally…
    • Resolved
    • Answered

  • DRA712: layout design guide for J6

    Resolved
    Part Number: DRA712 Hi Experts, A customer has to use through holes on their PCB. They would like to know the total number of the required via and the via design requirement. It seems that a through hole can be placed between 4 pins. If so, please let us…
    • Resolved

  • DRA712: [DRA71x_DDR3L] Leveling timeout on EMIF

    Part Number: DRA712 Hi Ti, OS: QNX DDR3L SDRAM : MT41K128M16JT125AIT I use the DDR tool provided by ti to generate DDR parameters. After configuring DDR parameters, a timeout occurred during DDR initialization. Related log： --> init_sdram chip_revision…

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