Part Number: FPC402 Tool/software: Hello,
We are looking at using FPC402 in our design. We want to know if FPC402 supports CSFP+.
Also, we want to know if there is Octa port controller or any higher number port controller which also supports CSFP+. …
Hi again,
I have checked, but i don't think it's the cause.
Default time out is 10ms and will trigger a int to CPU. But this is not we want. We would like to see FPC402 recover by itself.
And meanwhile it's far away from 300ms or 700ms.
…
Greetings,
I apologize but for some reason i cannot download this pdf file. I go through the authentication but i get the msgs like below and it does not allow me to download this file. Would it be possible if you could please attach pdf file to this case…
Part Number: FPC402 For our new design, there will be two FPC402 with each one connected to 4 SFP+. And there’s another QSFP-DD connected to FPGA directly.
SFP LED blinking can be synchronized by CTRL4 to CTRL3 pin daisy chain. But how to synchronize…
Part Number: FPC402 The VDD2 is connected to 1.8V in my design.
Are PROTOCOL_SEL and TEST_N 3.3-V LVCMOS tolerant? If I want to reserve pull-up resisters for these two pins, should I pull-up them to 3.3V?
Part Number: FPC402 Hello expert,
As title, when CPU try to access FPC402 via I2C, could FPC402 define I2C baud rate ?
Or what is the time gap limitation between each I2C frame ?
Best regards,
Ann Lien
Part Number: FPC402 Other Parts Discussed in Thread: FPC401
Hello. The FPC 402 Programmer's Guide (SNLU 221) is required to check the registers on the FPC 401. I sent a request from the TI Request page because I found the following on the data sheet…
Part Number: FPC402 Hi team,
I'm creating this E2E post in order to track testing that has been completed in order to understand why there is an issue with using address 0x1E for the downstream FPC402.
Best,
Emil
Part Number: FPC402 I would like to see the register map for the FPC402 chip but cannot find anything in the data sheet. I would like to have the SNLU227 Programmer's Guide to see the register map.