Part Number: FPC402 Tool/software:
Team,
One of my customer is using the FPC402RHUR for SFP28 interface, please review the attached schematic and provide your feedback.
Please Note:
This is a hierarchical based schematic (1 st page is the…
Part Number: FPC402 Hi Ti team,
I am using this part in my design. Please find the attached image, kindly review and let me know the feedback.
Also I have a query ; do we need to use pull-up or pull- down on OUT pins ( pin #40,38., etc) as per datasheet…
Part Number: FPC402 Tool/software: Hello,
We are looking at using FPC402 in our design. We want to know if FPC402 supports CSFP+.
Also, we want to know if there is Octa port controller or any higher number port controller which also supports CSFP…
Part Number: FPC402 Tool/software: During remote downstream port access, we suspect the internal port state machine is stuck.
When the issue happens there is always NACK received after logical device I2C address is sent by Host, and also there is no…
Part Number: FPC402 Tool/software: when one time prefetch is used the data from port is stored in local memory of FPC402
how to access this local memory and read the values from it ? what the location of this local memory inside FPC402 ?
i look…
Part Number: FPC402 Hello expert,
As title, when CPU try to access FPC402 via I2C, could FPC402 define I2C baud rate ?
Or what is the time gap limitation between each I2C frame ?
Best regards,
Ann Lien
Part Number: FPC402 Hi team,
I'm creating this E2E post in order to track testing that has been completed in order to understand why there is an issue with using address 0x1E for the downstream FPC402.
Best,
Emil
Part Number: FPC402 For our new design, there will be two FPC402 with each one connected to 4 SFP+. And there’s another QSFP-DD connected to FPGA directly.
SFP LED blinking can be synchronized by CTRL4 to CTRL3 pin daisy chain. But how to synchronize…
