Hello Ethan,
Although not for MCASP, the thread discuss sharing of clock across multiple EPHYs that could help understand the approach.
(+) LMK1C1104: Clock Architecture for DP83869HM Ethernet PHY - Clock & timing forum - Clock & timing - TI E2E support…
LMK1C1104 is a good recommendation based on the requirement.
The duty cycle distortion will depend on the input clock frequency and edge rate. When supplied from VDD = 1.8V, the input threshold is 900mV. Higher frequency and slower edges will make the…
Part Number: AM6442 AM2432 AM6411 AM2431 AM6422 AM6412 AM6421 AM2434 AM6441 Other Parts Discussed in Thread: TMDS64EVM , AM6442 , LMK1C1104 , AM3352 , AM62A3-Q1 , AM62L , OMAP-L138 , AM62A7
Hi TI Experts,
I have the below queries regarding the crystal…
Part Number: LMK03806 Other Parts Discussed in Thread: LMK04821 , USB2ANY , LMK03318 , LMK04808 , LMK03328 , CDCEL925 , CDCE6214 , CDCE913 , CLOCKPRO Tool/software: Hi,
My question is somewhat related to my previous query:
https://e2e.ti.com/support…
Hello Andreas,
The LVCMOS output impedance isn't exact, and varies depending on DC load and AC frequency. We do provide an IBIS model for the LMK04803, which has the LVCMOS format included. I recommend using this for optimization, as it will be more…
Hi Burak,
Regarding the single-ended BAW oscillator reference. Please refer to our EVM designs TMDSCNCD28P65X (or) LAUNCHXL-F28P65X .
The output of the buffer used (LMK1C1104PW) has 50 ohms of output impedance. In this case, with 50 ohms trace impedance…
Hi Jonathon,
Currently, TI doesn't offer a pin to pin compatible 1:4 buffer in SOIC package as requested.
We do have 1:4 output channel option for LVCMOS in TSSOP if pin to pin compatibility and package requirements can be flexible. I have listed…
