Answered

• SN65LVDS116: Termination scheme for the SN65LVDS116 and SN65LVDS105

  

  Alex LeBlanc

  Resolved

  Part Number: SN65LVDS116 Other Parts Discussed in Thread: SN65LVDS105 , I have a design where I plan on generating a reference clock using a 64MHz CMOS oscillator, which I then bring to a SN65LVDS105 (CMOS to 4x LVDS). Three of the SN65LVDS105's outputs…

  • Resolved

  • over 2 years ago
  • Interface
  • Interface forum

• SN65LVDS105: Power consumption and phase noise

  

  Hans

  TI Thinks Resolved

  Part Number: SN65LVDS105 Hello Team, can you provide phase noise for this part, please? Signalfrequency = 40MHz. Are the typ. 23mA (RL=100Ohm) the current for the whole device? Thanks and Best Regards, Hans

  • over 4 years ago
  • Interface
  • Interface forum

• SN65LVDS105: The companion receiver for SN65LVDS105D

  

  Serm Wang

  TI Thinks Resolved

  Part Number: SN65LVDS105 Other Parts Discussed in Thread: DSLVDS1048 To whom it may concern, I am using the SN65LVDS105D to convert TTL clock to LVDS. Is there any suggested part as LVDS receiver to pair with SN65LVDS105D. Therefore, I can convert the…

  • over 5 years ago
  • Interface
  • Interface forum

• SN65LVDS105: Minimizing EMI radiation on output pins

  

  Leo Chow

  TI Thinks Resolved

  Part Number: SN65LVDS105 Hi, I have a question with regards to SN65LVDS105. In our circuit, there is a 25Mhz clock at the input pin but if we want to totally disable all the output. To minimise any EMI radiation and unwanted current flow, how should…

  • over 5 years ago
  • Interface
  • Interface forum
Answered

• SN65LVDS105: using 2 LVDS Repeaters to have 8 outputs

  

  Gery Alaerts

  Resolved

  Part Number: SN65LVDS105 Dear, I want to use 2 SN65LVDS105 LVDS Repeaters to have 8 similar outputs to serve for a fixed 50 MHz LVDS compatible clock signal. My clock signal is generated by a MiniZed board. The output of the MiniZed is 3.3 V. My…

  • Resolved

  • over 7 years ago
  • Clock & timing
  • Clock & timing forum

• RE: Confirmation on using SN65LVDS105 as 1:4 clock buffer

  

  Aaron Goodson

  Hi, We are closing this post due to inactivity. Please feel free to post again if you have any other questions. Regards, Aaron

  • over 8 years ago
  • Logic
  • Logic forum
Answered

• SN65LVDS105 : Converting LVTTL (3.3V) to LVDS(1.8V)

  

  Jin Kyung Han

  Resolved

  Other Parts Discussed in Thread: SN65LVDS105 , DS90LV011A , DS90LV017A Hello I would like to have Solution for converting Signal format from TTL(3.3V) to LVDS(1.8V). SN65LVDS105 can convert TTL(3.3V) to LVDS(3.3V) only but its function is not included…

  • Resolved

  • over 9 years ago
  • Interface
  • Interface forum
Answered

• Output magnitude of SN65LVDS105

  

  Di Wang

  Resolved

  Other Parts Discussed in Thread: SN65LVDS105 Hi, Below value is measured with Vid=±100mV, but the input of SN65LVDS105 is LVTTL level, it should be in Via, not Vid. My input is Via magnitude is over 3V as below shows. The differential output…

  • Resolved

  • over 10 years ago
  • Interface
  • Interface forum
Answered

• SN65LVDS105 maximum junction temperature

  

  Joey Grasty

  Resolved

  Hello, all: Sorry but I need some additional data on maximum recommended junction temperatures for SN65LVDS105PWR. The data sheet lists recommended ambient temperature of -40 to +85C, but not recommended maximum junction temperature. Customer is…

  • Resolved

  • over 15 years ago
  • Interface
  • Interface forum
Answered

• RE: DS90LV047A: Additive Jitter

  

  Boris van Wessel

  Resolved

  Thanks Amy, this has been very helpfull. I will be making a testprint with both the SN65LVDS105 and the DS90LV047A to see which component works best under my expected conditions. Have a good weekend!

  • over 1 year ago
  • Interface
  • Interface forum

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