Part Number: SN74AVC4T774 Other Parts Discussed in Thread: SN74AUC125 Tool/software: Hello TI Team,
Can i use this part with same voltage levels at both nodes.
VCCA = VCCB = any voltage either 1.2V or 1.8V
Thanks
Sanchit
Part Number: SN74AVC4T774 Tool/software: Hello
If the input transition rise or fall rate is out of SPEC, What is the impact on output?
Will the output switch between high and low levels when the input is in the threshold region(0.8V to 2V)?
Part Number: SN74AVC4T774 Other Parts Discussed in Thread: SN74AXC4T774 Tool/software: Dear TI support team,
Could you provide me SN74AVC4T774 and SN74AXC4T774 Ioz polarity and value depending on junction temperature ?
We found an issue on our design…
Part Number: SN74AVC4T774 Tool/software: In our application, SN74AVC4T774 is used as SPI buffer.
The rising edge of SPI SCLK has a back-hook at the input of SN74AVC4T774, and the voltage is around 1.5V.
The Min of V IH is 2V in SN74AVC4T774 datasheet. …
Part Number: SN74AVC4T774 Tool/software: Hi,
I want to confirm whether SN74AVC4T774 can be used as a buffer for SPI signals with VCCA and VCCB same 3.3V level.
My design includes a microcontroller and processor interfaced with the SPI interface and either…
Part Number: SN74AVC4T774-Q1 Tool/software: What is the delay when switching the direction pin from High to Low or Low to High?
I see OE to A/B delays, but nothing about delay when changing the direction pin.
Thanks. Mark
Part Number: SN74AVC4T774-Q1 Other Parts Discussed in Thread: SN74HCS151-Q1 , SN74AVC4T774 Tool/software: Hello,
I'm looking to use the SN74AVC4T774-Q1. Specifically orderable device 74AVC4T774QWBQBRQ1. This is the BQB (WQFN) package. The datasheet…
Part Number: SN74AVC4T774 Hello,
Does anyone know if TI will pre-sort chips before shipping?
For example, we are buying SN74AVC4T774 for use in a product and we want parts with the
faster propagation delays. If we get parts that are on the slower end…
Part Number: SN74AVC4T774 Tool/software: Hello
We have such a issue. LDAC signals have a lot of clutter signals during each cold boot from -5℃ before FPGA loading complete . It will cause the DAC work abnormal.
LDAC is always high at room temperature…
Hi Michael,
MCU -> level shifter -> flat cable -> pin board -> loopback dupont with Level shifter has a delay of ~10ns, without level shifter there is delay of ~2ns. Same configuration, just changes the fact the Level shifter is soldered or not. I think…