Part Number: TLK10022 Other Parts Discussed in Thread: TLK1501 , , TLK10081
I am planning the setup as shown and the communication will actually be both Tx and Rx between the TLK1501/TLK10022/FPGA. This setup will be repeated 16 times with the same…
Part Number: TLK10022 Could you please confirm that INAxN/P and INBxN/P inputs on TLK10022 have built-in 100 OHM termination resistors?
Datasheet is clear about REFCLKxN/P in this regard but nothing mentioning about INAxN/P and INBxN/P.
Part Number: TLK10022 Hello all,
For a design in which an aggregation is made from 5 to 10Gbps I am using a TLK10022. I will be using channel A input 0 and 1 (INA0P/N INA1P/N) as the inputs and at the output the HSTXAP/N pins (in 2:1 mode) .
I was…
Part Number: TLK10022 I need to aggregate 4 low speed streams each at 1.8Gbps and make a fast stream at 7.2Gbps.
Based on calculator I can use a REF CLK between [150-360] MHz. According to the datasheet the highest is the best to use but I have a hard…
Part Number: TLK10022 Hi team,
support need!
The customer finds that there is a path inputting in LS and outputting from LS drawn in green path. So customer wonders to know how to set register to achieve input in LS and output in LS without via HS…
Part Number: TLK10022
Hello,
I have a couple of 7.2Gbps aggregated data streams sent out at TLK10022 HSTX_A/B_P/N outputs and received by Xilinx FPGA at MGTHRXP/N inputs.
Regarding the FPGA RXDATA CLK one option is to use the recovered CLK from…
Hi Kouns,
If i understand you correctly, your customer is using multiple channel link 2 devices. Then this customer wants to use TLK10022 to aggregate channel link 2 data streams. Is my understanding correct? Can you please send us a block diagram?…
Part Number: TLK10002FPGAEVM Other Parts Discussed in Thread: TLK10232EVM , TLK10022 , TLK10002 , TLK10081 , TLK10031 Hello,
maybe a silly question: The product page of the TLK10002 lists beside the evaluation board a FPGA board, that can be used as…
