Hi,
1/ You configure your SI5345 in the goal to obtain 156.25MHz for refclk0
2/ You check that your refclk0 frequency is correctly set at 156.25Mhz (with an oscilloscope).
3/ You configure your TLK10232 and for the 2 registers below you use these value…
Part Number: TLK10232 HI,
Could I use TLK10232 as 10G LAN 3R application? It it can do this, how to process REFCLK? Do I need use CLK output through de-jitter?
Thanks
Part Number: TLK10232 Hi,
We've build a transmission system consists of Intel FPGA, optical fiber, TLK 10232 and Xilinx FPGA. The data firstly been sent from Intel FPGA to optical module by using KR. Than the optical modules on two chip transmit the data…
Part Number: TLK10232 Hi I.K,
We have got the assembled board. We have posted the issue faced in our assembled board in the below provided link https://e2e.ti.com/support/interface/f/138/p/729400/2692812#2692812
Part Number: TLK10232 Hi,
when I use TLK10232 at 10GKR mode, I use tester insert CV error. I check counter 0x10. it max value is 0xFF. Why it is not 0xffff? Do I need setup more?
Dump FPGA MDIO group 3 phy 06 dev 1e 00: 0610 0B26 8316 A848 1500 2000 F115…
Part Number: TLK10232 Working with TLK10232 at 1,25 Gbps in transparent mode Is it possible working with this device at 1,25 Gbps with the 8b/10B decoder/encoder and channel Sync Block disabled?. In this mode, the traffic between low speed serdes and high…