Hi Amarnath,
Yes, the TLK10232 will support that module on KR mode.
The TLK10232 was characterized for 10GBASE-KR, basically the main features for this mode is the Link Training and the Auto-Negotiation, that are disabled when the device is going to…
Part Number: TLK10232 Dear Sir:
Due to we want to rework solder balling for TLK10232. Does TI have rework document for TLK10232 such as below example?
http://www.ti.com/lit/ug/slib006/slib006.pdf
Best Regard
Jason
Part Number: TLK10232 I'm thinking of using a TLK10232 for clock recovery from a 10 Gbps data stream.
I will not be sending any data so the low-speed inputs will be tied off and all outputs will be floating. High-speed input will be connected to the…
Part Number: TLK10232 Hello,
We are planning to use TLK10232 for converting XAUI interface to SFP phy.
We have planned to use FTLX1475D3BTL - SFP+ module.
Hope TLK10232 supports FLTX1475D3BTL SFP+ module.
Thank you.
Part Number: TLK10232 Hello,
We have planned to use FTLX1475D3BTL - SFP+ module.
We are planning to use TLK10232 for converting XAUI interface to SFP phy. Hope TLK10232 supports FLTX1475D3BTL SFP+ module.
Thanks
Lakshmanan V
Part Number: TLK10232 Hi,
We met a problem very similar to
e2e.ti.com/.../649576
except that we use Xilinx's FPGA and we are currently stuck at the Pilot Run stage
Since Luis mentioned about "Unfortunately, these stage of "tuning" is exhaustive since…
Part Number: TLK10232 Hi,
For a new project, i want to use a TLK10232 for 10Gb link.
I want to know if it's possible to use this component only with these default register?
The high speed side need to comunicate at 10.312Gb and Low speed at 3.125Gb…
Part Number: TLK10232 In our product we use a TLK10232 for a connection (10G-KR, Clause 45) via a backplane to a central unit with a switch from Marvell 98CX8129 Hooper.
Our current problem is, that we are not able to reduce errors in the direction from…
Part Number: DP83869HM Other Parts Discussed in Thread: TLK10232 , DP83869 Hello,
We are considering the following design approach for i.MX8MP to work for a 1000Base-kx.
This approach involves two ICs. The first IC (PN: DP83869HM) is tasked with converting…
PROBLEM 1 :
LS_LN0_ERROR_COUNTER, LS_LN1_ERROR_COUNTER, LS_LN2_ERROR_COUNTER and LS_LN3_ERROR_COUNTER are some (CLEAR-ON-READ) COR registers. But if the LS side is not functional , these registers are always at xFFFF. These CLEAR-ON-READ registers cannot…