Hi Marcel,
1. I've checked the status registers of your current configuration, basically you got decode/encode errors, loss of signal, errors in low and high speed sides.
2. Could you try changing LS_SERDES_CONTROL_2 & LS_SERDES_CONTROL_2 to adjust…
Hi Yuli,
TLK10232 does not have an active register to disable invalid data on XAUI output when the link is down. There are some "indirect" solutions but it means "hardware solution" (please refer to TLK10232EVM users guide to take a look in a possible…
Other Parts Discussed in Thread: TLK10232 , TLK10232EVM Hi! I have a board ,there is a fpga and tlk10232 chip ,fpga sends test data to tlk10232 ,then tlk10232 sends data to fiber ,fiber loops data back to tlk10232 , tlk10232 sends the data back to fpga …