Part Number: XIO2001 Hi team,
We can see the description "slightly longer" below in Figure 3 of XIO2001 Implementation Guide, but could you tell what is the specific value of "slightly longer"?
>Feedback clock from CLKOUT6 should…
Part Number: XIO2001 Hi,
I have a card with 2 FPGAs connected to XIO2001. I have a problem where sometimes the the computer hangs during power up. The two FPGAs are identical in terms of content and the 2 FPGA know how to identify themselves as two different…
Part Number: XIO2001 Hi,
I am re-editing my PCB and schematic, mainly due to a stock problem of TI's DC2DC components, and I also want to improve the PCB layout in this case, since I have about 15% of boards that do not work/recognize on the PC. My circuit…
Part Number: XIO2001 I am relatively new to PCI & PCIe. I am tasked with a redesign of a standalone PWB design that used a PowerPC to configure three (3) TI DSPs (TMS320C6415) via the PowerPC's PCI interface. In the new design, the PowerPC is…
Hi Nicholaus
I have found the problem, because it is the shutdown timing problem on my circuit, because there are a lot of capacitors added to the xio2001 and no other devices are connected, the p3v3 discharge is too slow Thanks for your help.
Part Number: XIO2001 Hi Experts,
We would appreciate your support regarding this part (XIO2001IZWSR), For these Pins 'C/BE[0]' , 'C/BE[1]' , 'C/BE[2]' , 'C/BE[3]' we need to know if the BE function is active low also? or the 'C' only is the active low…
Part Number: XIO2001 Hi Team,
Good day, I am posting this inquiry on behalf of the customer.
For Pins 'C/BE[0]' , 'C/BE[1]' , 'C/BE[2]' , 'C/BE[3]' we need to know if the BE function is active low also? or the 'C' only is the active low? And for 'C' function…
Part Number: XIO2001 Hi,
My customer has two following questions of XIO2001 RESET on secondary bus.
When they writes 0 on SRST bit of "Bridge Control Register", XIO2001 asserts Low on PRST pin ASAP, regardless of PCI status (ex. during transferring data…
Part Number: XIO2001 Hi,
My customer did the simulation with IBIS model under the the following schematics .
There is the U2 waveform of toggle pattern on 2.5Gbps (1.25GHz) case. I seem good simulated waveform.
However, on the case of random pattern…